Lilian Bossuet

136 papers A 5B 5C 16Misc 3Journal 59Unranked 48
YearRankTypeTitle / Venue / Authors
2025 J jnl
Efficient Adaptive Multi-Level Privilege Partitioning With RTrustSoC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier, Théotime Bollengier
2025 J jnl
Improving the Masked Division for the FALCON Signature.
IACR Cryptol. ePrint Arch.
Pierre-Augustin Berthet, Justine Paillet, Cédric Tavernier, Lilian Bossuet, Brice Colombier
2025 Misc conf
Low-Latency FFT/iFFT RTL Implementation for the FALCON Post-Quantum Signature Algorithm.
FCCM
Alexandre Ortega, Lilian Bossuet, Brice Colombier
2025 J jnl
Power and Frequency Intrinsic Channels on gem5.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lilian Bossuet, Carlos Andres Lara-Nino
2025 J jnl
Unsupervised Horizontal Attacks against Public-Key Primitives with DCCA: - From Deep Canonical Correlation Analysis to Deep Collision Correlation Attacks -.
IACR Commun. Cryptol.
Dorian Llavata, Eleonora Cagli, Rémi Eyraud, Vincent Grosso, Lilian Bossuet
2024 — conf
A Lightweight Non-Oscillatory Delay-Sensor for Remote Power Analysis.
HOST
Anis Fellah-Touta, Lilian Bossuet, Carlos Andres Lara-Nino
2024 J jnl
High-Confidence Remote Power Analysis on Heterogeneous SoCs.
J. Hardw. Syst. Secur.
Anis Fellah-Touta, Lilian Bossuet, Carlos Andres Lara-Nino
2024 C conf
Lightweight Active Fences for FPGAs.
VLSI-SoC
Anis Fellah-Touta, Lilian Bossuet, Vincent Grosso, Carlos Andres Lara-Nino
2024 J jnl
Masked Computation of the Floor Function and Its Application to the FALCON Signature.
IACR Commun. Cryptol.
Pierre-Augustin Berthet, Justine Paillet, Cédric Tavernier, Lilian Bossuet, Brice Colombier
2024 J jnl
Scoring the predictions: a way to improve profiling side-channel attacks.
IACR Cryptol. ePrint Arch.
Damien Robissout, Lilian Bossuet, Amaury Habrard
2024 J jnl
Scoring the predictions: a way to improve profiling side-channel attacks.
J. Cryptogr. Eng.
Damien Robissout, Lilian Bossuet, Amaury Habrard
2024 J jnl
Switching Off your Device Does Not Protect Against Fault Attacks.
IACR Cryptol. ePrint Arch.
Paul Grandamme, Pierre-Antoine Tissot, Lilian Bossuet, Jean-Max Dutertre, Brice Colombier, Vincent Grosso
2024 J jnl
Switching Off your Device Does Not Protect Against Fault Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Paul Grandamme, Pierre-Antoine Tissot, Lilian Bossuet, Jean-Max Dutertre, Brice Colombier, Vincent Grosso
2023 — conf
Advanced Covert-Channels in Modern SoCs.
HOST
Lilian Bossuet, Carlos Andres Lara-Nino
2023 C conf
BALoo: First and Efficient Countermeasure Dedicated to Persistent Fault Attacks.
IOLTS
Pierre-Antoine Tissot, Lilian Bossuet, Vincent Grosso
2023 J jnl
BALoo: First and Efficient Countermeasure dedicated to Persistent Fault Attacks.
IACR Cryptol. ePrint Arch.
Pierre-Antoine Tissot, Lilian Bossuet, Vincent Grosso
2023 — conf
Combined Internal Attacks on SoC-FPGAs: Breaking AES with Remote Power Analysis and Frequency-based Covert Channels.
EuroS&P Workshops
Anis Fellah-Touta, Lilian Bossuet, Carlos Andres Lara-Nino
2023 J jnl
Conditional Variational AutoEncoder based on Stochastic Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Gabriel Zaid, Lilian Bossuet, Mathieu Carbone, Amaury Habrard, Alexandre Venelli
2023 C conf
Deep Stacking Ensemble Learning Applied to Profiling Side-Channel Attacks.
CARDIS
Dorian Llavata, Eleonora Cagli, Rémi Eyraud, Vincent Grosso, Lilian Bossuet
2023 — conf
Emulating Covert Data Transmission on Heterogeneous SoCs.
AsianHOST
Lilian Bossuet, Carlos Andres Lara-Nino
2023 — conf
Emulating Side Channel Attacks on gem5: lessons learned.
EuroS&P Workshops
Lilian Bossuet, Vincent Grosso, Carlos Andres Lara-Nino
2023 — conf
Low-Latency Masking with Arbitrary Protection Order Based on Click Elements.
HOST
Mateus Simões, Lilian Bossuet, Nicolas Bruneau, Vincent Grosso, Patrick Haddad, Thomas Sarno
2023 C conf
Secured-by-design systems-on-chip: a MBSE Approach.
RSP
Raphaële Milan, Loïc Lagadec, Théotime Bollengier, Lilian Bossuet, Ciprian Teodorov
2023 — conf
TrustSoC: Light and Efficient Heterogeneous SoC Architecture, Secure-by-design.
AsianHOST
Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier
2022 J jnl
Conditional Variational AutoEncoder based on Stochastic Attack.
IACR Cryptol. ePrint Arch.
Gabriel Zaid, Lilian Bossuet, Mathieu Carbone, Amaury Habrard, Alexandre Venelli
2022 — conf
Insertion of random delay with context-aware dummy instructions generator in a RISC-V processor.
HOST
Gaëtan Leplus, Olivier Savry, Lilian Bossuet
2022 C conf
SecDec: Secure Decode Stage thanks to masking of instructions with the generated signals.
DSD
Gaëtan Leplus, Olivier Savry, Lilian Bossuet
2022 J jnl
Self-Timed Masking: Implementing First-Order Masked S-Boxes Without Registers.
IACR Cryptol. ePrint Arch.
Mateus Simoes, Lilian Bossuet, Nicolas Bruneau, Vincent Grosso, Patrick Haddad
2022 C conf
Self-timed Masking: Implementing Masked S-Boxes Without Registers.
CARDIS
Mateus Simoes, Lilian Bossuet, Nicolas Bruneau, Vincent Grosso, Patrick Haddad, Thomas Sarno
2021 C conf
Cross-layer Approach to Assess FMEA on Critical Systems and Evaluate High-Level Model Realism.
VLSI-SoC
Julie Roux, Katell Morin-Allory, Vincent Beroulle, Régis Leveugle, Lilian Bossuet, Frédéric Cézilly, Frédéric Berthoz, Gilles Genévrier, François Cerisier
2021 J jnl
Efficiency through Diversity in Ensemble Models applied to Side-Channel Attacks - A Case Study on Public-Key Algorithms -.
IACR Cryptol. ePrint Arch.
Gabriel Zaid, Lilian Bossuet, Amaury Habrard, Alexandre Venelli
2021 J jnl
Efficiency through Diversity in Ensemble Models applied to Side-Channel Attacks - A Case Study on Public-Key Algorithms -.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Gabriel Zaid, Lilian Bossuet, Amaury Habrard, Alexandre Venelli
2021 — conf
FMEA on Critical Systems: A Cross-Layer Approach Based on High-Level Models.
VLSI-SoC (Selected Papers)
Julie Roux, Katell Morin-Allory, Vincent Beroulle, Lilian Bossuet, Frédéric Cézilly, Frédéric Berthoz, Gilles Genévrier, François Cerisier, Régis Leveugle
2021 J jnl
Improving Deep Learning Networks for Profiled Side-Channel Analysis Using Performance Improvement Techniques.
IACR Cryptol. ePrint Arch.
Damien Robissout, Lilian Bossuet, Amaury Habrard, Vincent Grosso
2021 J jnl
Improving Deep Learning Networks for Profiled Side-channel Analysis Using Performance Improvement Techniques.
ACM J. Emerg. Technol. Comput. Syst.
Damien Robissout, Lilian Bossuet, Amaury Habrard, Vincent Grosso
2021 — conf
Message-Recovery Laser Fault Injection Attack on the Classic McEliece Cryptosystem.
EUROCRYPT (2)
Pierre-Louis Cayrel, Brice Colombier, Vlad-Florin Dragoi, Alexandre Menu, Lilian Bossuet
2021 C conf
Multi-Spot Laser Fault Injection Setup: New Possibilities for Fault Injection Attacks.
CARDIS
Brice Colombier, Paul Grandamme, Julien Vernay, Émilie Chanavat, Lilian Bossuet, Lucie de Laulanié, Bruno Chassagne
2021 J jnl
Ranking Loss: Maximizing the Success Rate in Deep Learning Side-Channel Analysis.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Gabriel Zaid, Lilian Bossuet, François Dassance, Amaury Habrard, Alexandre Venelli
2021 C conf
Security Assessment of Heterogeneous SoC-FPGA: On the Practicality of Cache Timing Attacks.
VLSI-SoC
Lilian Bossuet, El Mehdi Benhani
2021 J jnl
The use of ellipse-based estimator as a sub-key distinguisher for Side-Channel Analysis.
Comput. Electr. Eng.
Alberto F. Martínez-Herrera, J. Carlos Mex-Perera, Cuauhtemoc Mancillas-López, Carolina Del-Valle-Soto, Lilian Bossuet
2021 — conf
Virtual Platform to Analyze the Security of a System on Chip at Microarchitectural Level.
EuroS&P Workshops
Quentin Forcioli, Jean-Luc Danger, Clémentine Maurice, Lilian Bossuet, Florent Bruguier, Maria Mushtaq, David Novo, Loïc France, Pascal Benoit, Sylvain Guilley, Thomas Perianin
2020 A conf
Backtracking Search for Optimal Parameters of a PLL-based True Random Number Generator.
DATE
Brice Colombier, Nathalie Bochard, Florent Bernard, Lilian Bossuet
2020 C conf
Cross Layer Fault Simulations for Analyzing the Robustness of RTL Designs in Airborne Systems.
DDECS
Julie Roux, Vincent Beroulle, Katell Morin-Allory, Régis Leveugle, Lilian Bossuet, Frédéric Cézilly, Frédéric Berthoz, Gilles Genévrier, François Cerisier
2020 — conf
High Level Fault Injection Method for Evaluating Critical System Parameter Ranges.
ICECS
Julie Roux, Vincent Beroulle, Katell Morin-Allory, Régis Leveugle, Lilian Bossuet, Frédéric Cézilly, Frédéric Berthoz, Gilles Genévrier, François Cerisier
2020 J jnl
Message-recovery Laser Fault Injection Attack on Code-based Cryptosystems.
IACR Cryptol. ePrint Arch.
Pierre-Louis Cayrel, Brice Colombier, Vlad-Florin Dragoi, Alexandre Menu, Lilian Bossuet
2020 J jnl
Methodology for Efficient CNN Architectures in Profiling Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Gabriel Zaid, Lilian Bossuet, Amaury Habrard, Alexandre Venelli
2020 — conf
Online Performance Evaluation of Deep Learning Networks for Profiled Side-Channel Analysis.
COSADE
Damien Robissout, Gabriel Zaid, Brice Colombier, Lilian Bossuet, Amaury Habrard
2020 J jnl
Online Performance Evaluation of Deep Learning Networks for Side-Channel Analysis.
IACR Cryptol. ePrint Arch.
Damien Robissout, Gabriel Zaid, Brice Colombier, Lilian Bossuet, Amaury Habrard
2020 — conf
Physical Security of Ring-based PUF.
ECCTD
Lilian Bossuet
2020 J jnl
Pipelined Hardware Implementation of COPA, ELmD, and COLM.
IEEE Trans. Computers
Lilian Bossuet, Cuauhtemoc Mancillas-López, Brisbane Ovilla-Martinez
2020 J jnl
Ranking Loss: Maximizing the Success Rate in Deep Learning Side-Channel Analysis.
IACR Cryptol. ePrint Arch.
Gabriel Zaid, Lilian Bossuet, François Dassance, Amaury Habrard, Alexandre Venelli
2020 J jnl
Secure Internal Communication of a Trustzone-Enabled Heterogeneous Soc Lightweight Encryption.
CoRR
El Mehdi Benhani, Cuauhtemoc Mancillas López, Lilian Bossuet
2020 J jnl
Understanding Methodology for Efficient CNN Architectures in Profiling Attacks.
IACR Cryptol. ePrint Arch.
Gabriel Zaid, Lilian Bossuet, Amaury Habrard, Alexandre Venelli
2019 J jnl
DVFS as a Security Failure of TrustZone-enabled Heterogeneous SoC.
CoRR
El Mehdi Benhani, Lilian Bossuet
2019 J jnl
Experimental Study of Locking Phenomena on Oscillating Rings Implemented in Logic Devices.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ugo Mureddu, Nathalie Bochard, Lilian Bossuet, Viktor Fischer
2019 J jnl
Methodology for Efficient CNN Architectures in Profiling Attacks.
IACR Cryptol. ePrint Arch.
Gabriel Zaid, Lilian Bossuet, Amaury Habrard, Alexandre Venelli
2019 — conf
Secure Internal Communication of a Trustzone-Enabled Heterogeneous Soc Lightweight Encryption.
FPT
El Mehdi Benhani, Cuauhtemoc Mancillas López, Lilian Bossuet
2019 J jnl
The Security of ARM TrustZone in a FPGA-Based SoC.
IEEE Trans. Computers
El Mehdi Benhani, Lilian Bossuet, Alain Aubert
2019 — conf
Transient Effect Ring Oscillators Leak Too.
ISVLSI
Ugo Mureddu, Brice Colombier, Nathalie Bochard, Lilian Bossuet, Viktor Fischer
2019 J jnl
Transient Effect Ring Oscillators Leak Too.
IACR Cryptol. ePrint Arch.
Ugo Mureddu, Brice Colombier, Nathalie Bochard, Lilian Bossuet, Viktor Fischer
2018 — conf
DVFS as a Security Failure of TrustZone-enabled Heterogeneous SoC.
ICECS
El Mehdi Benhani, Lilian Bossuet
2018 J jnl
Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Cédric Marchand, Lilian Bossuet, Ugo Mureddu, Nathalie Bochard, Abdelkarim Cherkaoui, Viktor Fischer
2018 J jnl
JTAG Fault Injection Attack.
IEEE Embed. Syst. Lett.
Fabien Majéric, Benoit Gonzalvo, Lilian Bossuet
2017 — conf
A comprehensive hardware/software infrastructure for IP cores design protection.
FPT
Brice Colombier, Lilian Bossuet, Ugo Mureddu, David Hély
2017 J jnl
Area-oriented comparison of lightweight block ciphers implemented in hardware for the activation mechanism in the anti-counterfeiting schemes.
Int. J. Circuit Theory Appl.
Cédric Marchand, Lilian Bossuet, Kris Gaj
2017 — conf
Centrality Indicators for Efficient and Scalable Logic Masking.
ISVLSI
Brice Colombier, Lilian Bossuet, David Hély
2017 B conf
Complete activation scheme for FPGA-oriented IP cores design protection.
FPL
Brice Colombier, Ugo Mureddu, Marek Laban, Oto Petura, Lilian Bossuet, Viktor Fischer
2017 — conf
Efficient design of Oscillator based Physical Unclonable Functions on Flash FPGAs.
IVSW
Ugo Mureddu, Oto Petura, Nathalie Bochard, Lilian Bossuet, Viktor Fischer
2017 J jnl
Key Reconciliation Protocols for Error Correction of Silicon PUF Responses.
IEEE Trans. Inf. Forensics Secur.
Brice Colombier, Lilian Bossuet, Viktor Fischer, David Hély
2017 — conf
On the security evaluation of the ARM TrustZone extension in a heterogeneous SoC.
SoCC
El Mehdi Benhani, Cédric Marchand, Alain Aubert, Lilian Bossuet
2017 C conf
Restoration protocol: Lightweight and secur devices authentication based on PUF.
VLSI-SoC
Brisbane Ovilla-Martinez, Lilian Bossuet
2017 J jnl
Timing attack on NoC-based systems: Prime+Probe attack and NoC-based protection.
Microprocess. Microsystems
Cezar Reinbrecht, Altamiro Amadeu Susin, Lilian Bossuet, Georg Sigl, Johanna Sepúlveda
2016 B conf
A survey of AIS-20/31 compliant TRNG cores suitable for FPGA devices.
FPL
Oto Petura, Ugo Mureddu, Nathalie Bochard, Viktor Fischer, Lilian Bossuet
2016 J jnl
Comments on "A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-per-Device Licensing".
IEEE Trans. Inf. Forensics Secur.
Lilian Bossuet, Brice Colombier
2016 — conf
Design and Characterization of the TERO-PUF on SRAM FPGAs.
ISVLSI
Cédric Marchand, Lilian Bossuet, Abdelkarim Cherkaoui
2016 J jnl
Design, Evaluation, and Optimization of Physical Unclonable Functions Based on Transient Effect Ring Oscillators.
IEEE Trans. Inf. Forensics Secur.
Abdelkarim Cherkaoui, Lilian Bossuet, Cédric Marchand
2016 J jnl
ELmD: A Pipelineable Authenticated Encryption and Its Hardware Implementation.
IEEE Trans. Computers
Lilian Bossuet, Nilanjan Datta, Cuauhtemoc Mancillas-López, Mridul Nandi
2016 — conf
Electromagnetic security tests for SoC.
ICECS
Fabien Majéric, Eric Bourbao, Lilian Bossuet
2016 A conf
Enhanced TERO-PUF Implementations and Characterization on FPGAs (Abstract Only).
FPGA
Cédric Marchand, Lilian Bossuet, Abdelkarim Cherkaoui
2016 J jnl
Fault model of electromagnetic attacks targeting ring oscillator-based true random number generators.
J. Cryptogr. Eng.
Pierre Bayon, Lilian Bossuet, Alain Aubert, Viktor Fischer
2016 J jnl
From secured logic to IP protection.
Microprocess. Microsystems
Brice Colombier, Lilian Bossuet, David Hély
2016 — conf
Gossip NoC - Avoiding Timing Side-Channel Attacks through Traffic Management.
ISVLSI
Cezar Reinbrecht, Altamiro Amadeu Susin, Lilian Bossuet, Johanna Sepúlveda
2016 — conf
Hardware security: From concept to application.
EWME
Florent Bruguier, Pascal Benoit, Lionel Torres, Lilian Bossuet
2016 J jnl
Identification of IP control units by state encoding and side channel verification.
Microprocess. Microsystems
Edward Jung, Lilian Bossuet, Seonho Choi, Cédric Marchand
2016 J jnl
Introduction to Special Issue on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE).
Microprocess. Microsystems
Lilian Bossuet, Giorgio Di Natale, Paris Kitsos
2016 — conf
JTAG Combined Attack - Another Approach for Fault Injection.
NTMS
Fabien Majéric, Benoit Gonzalvo, Lilian Bossuet
2016 J jnl
Key Reconciliation Protocols for Error Correction of Silicon PUF Responses.
IACR Cryptol. ePrint Arch.
Brice Colombier, Lilian Bossuet, David Hély, Viktor Fischer
2016 — conf
Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack.
SBCCI
Cezar Reinbrecht, Altamiro Amadeu Susin, Lilian Bossuet, Georg Sigl, Martha Johanna Sepúlveda
2015 J jnl
An Ultra-Lightweight Transmitter for Contactless Rapid Identification of Embedded IP in FPGA.
IEEE Embed. Syst. Lett.
Lilian Bossuet, Pierre Bayon, Viktor Fischer
2015 C conf
Contactless transmission of intellectual property data to protect FPGA designs.
VLSI-SoC
Lilian Bossuet, Viktor Fischer, Pierre Bayon
2015 J jnl
Disposable configuration of remotely reconfigurable systems.
Microprocess. Microsystems
Lilian Bossuet, Viktor Fischer, Lubos Gaspar, Lionel Torres, Guy Gogniat
2015 — conf
Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs.
VLSI-SoC (Selected Papers)
Lilian Bossuet, Pierre Bayon, Viktor Fischer
2015 Misc conf
Functional Locking Modules for Design Protection of Intellectual Property Cores.
FCCM
Brice Colombier, Lilian Bossuet
2015 Misc conf
Identification of embedded control units by state encoding and power consumption analysis.
SAC
Edward Jung, Cédric Marchand, Lilian Bossuet
2015 — conf
Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection.
ISVLSI
Brice Colombier, Lilian Bossuet, David Hély
2014 J jnl
A PUF Based on a Transient Effect Ring Oscillator and Insensitive to Locking Phenomenon.
IEEE Trans. Emerg. Top. Comput.
Lilian Bossuet, Xuan Thuy Ngo, Zouha Cherif, Viktor Fischer
2014 C conf
Electromagnetic analysis and fault injection onto secure circuits.
VLSI-SoC
Paolo Maistri, Régis Leveugle, Lilian Bossuet, Alain Aubert, Viktor Fischer, Bruno Robisson, Nicolas Moro, Philippe Maurine, Jean-Max Dutertre, Mathieu Lisart
2014 — conf
IP watermark verification based on power consumption analysis.
SoCC
Cédric Marchand, Lilian Bossuet, Edward Jung
2014 — conf
New paradigms for access control in constrained environments.
ReCoSoC
Abdelkarim Cherkaoui, Lilian Bossuet, Ludwig Seitz, Göran Selander, Ravishankar Borgaonkar
2014 J jnl
Survey of hardware protection of design data for integrated circuits and intellectual properties.
IET Comput. Digit. Tech.
Brice Colombier, Lilian Bossuet
2014 J jnl
Sustainable electronics: On the trail of reconfigurable computing.
Sustain. Comput. Informatics Syst.
Lilian Bossuet
2013 J jnl
Architectures of flexible symmetric key crypto engines - a survey: From hardware coprocessor to multi-crypto-processor system on chip.
ACM Comput. Surv.
Lilian Bossuet, Michael Grand, Lubos Gaspar, Viktor Fischer, Guy Gogniat
2013 C conf
Electromagnetic analysis on ring oscillator-based true random number generators.
ISCAS
Pierre Bayon, Lilian Bossuet, Alain Aubert, Viktor Fischer
2013 — conf
Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA.
HASP@ISCA
Zouha Cherif, Jean-Luc Danger, Florent Lozach, Yves Mathieu, Lilian Bossuet
2013 — conf
Teaching FPGA security.
FPT
Lilian Bossuet
2012 C conf
An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF.
DSD
Zouha Cherif, Jean-Luc Danger, Sylvain Guilley, Lilian Bossuet
2012 J jnl
Automatic low-cost IP watermarking technique based on output mark insertions.
Des. Autom. Embed. Syst.
Bertrand Le Gal, Lilian Bossuet
2012 — conf
Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator.
COSADE
Pierre Bayon, Lilian Bossuet, Alain Aubert, Viktor Fischer, François Poucheret, Bruno Robisson, Philippe Maurine
2012 J jnl
Secure Extension of FPGA General Purpose Processors for Symmetric Key Cryptography with Partial Reconfiguration Capabilities.
ACM Trans. Reconfigurable Technol. Syst.
Lubos Gaspar, Viktor Fischer, Lilian Bossuet, Robert Fouquet
2011 — conf
A Reconfigurable Multi-core Cryptoprocessor for Multi-channel Communication Systems.
IPDPS Workshops
Michael Grand, Lilian Bossuet, Guy Gogniat, Bertrand Le Gal, Jean-Philippe Delahaye, Dominique Dallet
2011 B conf
Cryptographic Extension for Soft General-Purpose Processors with Secure Key Management.
FPL
Lubos Gaspar, Viktor Fischer, Lilian Bossuet, Milos Drutarovský
2011 — conf
Design and Implementation of a Multi-Core Crypto-Processor for Software Defined Radios.
ARC
Michael Grand, Lilian Bossuet, Bertrand Le Gal, Guy Gogniat, Dominique Dallet
2011 J jnl
Fast Digital Post-Processing Technique for Integral Nonlinearity Correction of Analog-to-Digital Converters: Validation on a 12-Bit Folding-and-Interpolating Analog-to-Digital Converter.
IEEE Trans. Instrum. Meas.
Vincent Kerzerho, Vincent Fresnaud, Dominique Dallet, Serge Bernard, Lilian Bossuet
2011 — conf
Secure extensions of FPGA soft core processors for symmetric key cryptography.
ReCoSoC
Lubos Gaspar, Viktor Fischer, Lilian Bossuet, Robert Fouquet
2010 — conf
A low-area filter bank design methodology for on-chip ADC testing.
ICECS
Nicolas Mechouk, Dominique Dallet, Lilian Bossuet, Bertrand Le Gal
2010 — conf
Area optimization of ROM-based controllers dedicated to digital signal processing applications.
EUSIPCO
Bertrand Le Gal, Aurélien Ribon, Lilian Bossuet, Dominique Dallet
2010 — conf
HCrypt: A Novel Concept of Crypto-processor with Secured Key Management.
ReConFig
Lubos Gaspar, Viktor Fischer, Florent Bernard, Lilian Bossuet, Pascal Cotret
2010 — conf
Reducing and smoothing power consumption of ROM-based controller implementations.
SBCCI
Bertrand Le Gal, Aurélien Ribon, Lilian Bossuet, Dominique Dallet
2008 C conf
A new orthogonal online digital calibration for time-interleaved analog-to-digital converters.
ISCAS
Guillaume Ferré, Maher Jridi, Lilian Bossuet, Bertrand Le Gal, Dominique Dallet
2008 — conf
Orthogonal correction implementation for time interleaved analog-to-digital converters: Realtime application.
EUSIPCO
Guillaume Ferré, Bertrand Le Gal, Lilian Bossuet, Maher Jridi, Dominique Dallet, Pierre Colucci
2008 J jnl
Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective.
IEEE Trans. Very Large Scale Integr. Syst.
Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-Philippe Diguet, Lilian Bossuet, Romain Vaslin
2007 J jnl
Communication-Oriented Design Space Exploration for Reconfigurable Architectures.
EURASIP J. Embed. Syst.
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
2007 — conf
HLS design flow for the synthesis of multimode systems under multiple constraints.
ICECS
Bertrand Le Gal, Lilian Bossuet, Shafqat Khan, Emmanuel Casseau
2007 — conf
Mathematical functions based watermarking for IPP.
ICECS
Bertrand Le Gal, Lilian Bossuet, Dominique Dallet
2006 B conf
A Low Cost Alternative Method for Harmonics Estimation in a BIST Context.
ETS
Vincent Fresnaud, Lilian Bossuet, Dominique Dallet, Serge Bernard, Jean-Marie Janik, B. Agnus, Philippe Cauvet, Ph. Gandy
2006 — conf
An offset and gain calibration method for time-interleaved analog to digital converters.
ICECS
Maher Jridi, Guillaume Monnerie, Lilian Bossuet, Dominique Dallet
2006 J jnl
Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
2006 J jnl
Dynamically configurable security for SRAM FPGA bitstreams.
Int. J. Embed. Syst.
Lilian Bossuet, Guy Gogniat, Wayne P. Burleson
2006 J jnl
Exploration de l'espace de conception des architectures reconfigurables.
Tech. Sci. Informatiques
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
2005 — conf
Configurable Computing for High-Security/High-Performance Ambient Systems.
SAMOS
Guy Gogniat, Wayne P. Burleson, Lilian Bossuet
2005 A conf
Generic Design Space Exploration for Reconfigurable Architectures.
IPDPS
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
2004 A conf
Dynamically Configurable Security for SRAM FPGA Bitstreams.
IPDPS
Lilian Bossuet, Guy Gogniat, Wayne P. Burleson
2003 B conf
Communication Costs Driven Design Space Exploration for Reconfigurable Architectures.
FPL
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
2003 — conf
Fast Design Space Exploration Method for Reconfigurable Architectures.
Engineering of Reconfigurable Systems and Algorithms
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
2003 — conf
Fast prototyping of reconfigurable architectures from a C program.
ISCAS (5)
Sébastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
2003 A conf
Targeting Tiled Architectures in Design Exploration.
IPDPS
Lilian Bossuet, Wayne P. Burleson, Guy Gogniat, Vikas Anand, Andrew Laffely, Jean Luc Philippe