Lilia Zaourar

35 papers A* 1B 3C 6Journal 6Unranked 14
YearRankTypeTitle / Venue / Authors
2026 J jnl
NET4EXA: Pioneering the Future of Interconnects for Supercomputing and AI.
CoRR
Michele Martinelli, Roberto Ammendola, Andrea Biagioni, Carlotta Chiarini, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Elena Pastorelli, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Francesco Simula, Piero Vicini, David Colin, Grégoire Pichon, Alexandre Louvet, John Gliksberg, Claire Chen, Matteo Turisini, Andrea Monterubbiano, Jean-Philippe Nominé, Denis Dutoit, Hugo Taboada, Lilia Zaourar, Mohamed Benazouz, Angelos Bilas, Fabien Chaix, Manolis Katevenis, Nikolaos Chrysos, Evangelos Mageiropoulos, Christos Kozanitis, Thomas Moen, Steffen Persvold, Einar Rustad, Sandro Fiore, Fabrizio Granelli, Simone Pezzuto, Raffaello Potestio, Luca Tubiana, Philippe Velha, Flavio Vella, Daniele De Sensi, Salvatore Pontarelli
2026 — ed.
Proceedings of the Rapid Simulation and Performance Evaluation for Design, RAPIDO 2026, Kraków, Poland, 27 January 2026
RAPIDO@HiPEAC
Lilia Zaourar, Morteza Biglari-Abhari, Daniel Chillet, Daniel Gracia Pérez, Réda Nouacer, Matthias Jung, Gianluca Palermo
2025 A* conf
High-Performance Computing Architecture Exploration with Stage-Enhanced Bayesian Optimization.
DAC
Vincent Fu, Mohamed Benazouz, Lilia Zaourar, Alix Munier Kordon
2025 C conf
NET4EXA: Pioneering the Future of Interconnects for Supercomputing and AI.
DSD
Michele Martinelli, Roberto Ammendola, Andrea Biagioni, Carlotta Chiarini, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Elena Pastorelli, Pierpaolo Perticaroli, Luca Pontisso, Cristian Rossi, Francesco Simula, Piero Vicini, David Colin, Grégoire Pichon, Alexandre Louvet, John Gliksberg, Claire Chen, Matteo Turisini, Andrea Monterubbiano, Jean-Philippe Nominé, Denis Dutoit, Hugo Taboada, Lilia Zaourar, Mohamed Benazouz, Angelos Bilas, Fabien Chaix, Manolis Katevenis, Nikolaos Chrysos, Evangelos Mageiropoulos, Christos Kozanitis, Thomas Moen, Steffen Persvold, Einar Rustad, Sandro Fiore, Fabrizio Granelli, Simone Pezzuto, Raffaello Potestio, Luca Tubiana, Philippe Velha, Flavio Vella, Daniele De Sensi, Salvatore Pontarelli
2025 — ed.
Proceedings of the Rapid Simulation and Performance Evaluation for Design Workshop, RAPIDO 2025, Barcelona, Spain, 21 January 2025
RAPIDO@HiPEAC
Lilia Zaourar, Morteza Biglari-Abhari, Daniel Chillet, Daniel Gracia Pérez, Réda Nouacer, Matthias Jung, Gianluca Palermo
2024 — conf
Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC.
ARCS
Lilia Zaourar, Mohamed Benazouz, Ayoub Mouhagir, Carlos Falquez, Antoni Portero, Nam Ho, Estela Suarez, Polydoros Petrakis, Manolis Marazakis, Francesco Sgherzi, Ivan Fernandez, Romain Dolbeau, Dirk Pleiter
2024 — conf
Design Space Exploration of HPC Systems with Random Forest-based Bayesian Optimization.
RAPIDO@HiPEAC
Vincent Fu, Lilia Zaourar, Alix Munier Kordon, Marc Duranton
2024 — conf
Hypergraph Clustering with Path-Length Awareness.
ICCS (5)
Julien Rodriguez, François Galea, François Pellegrini, Lilia Zaourar
2024 B conf
Message from the General Chairs SEAA 2024.
SEAA
Lilia Zaourar, Andrea Pinna
2024 — ed.
Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design, RAPIDO 2024, Munich, Germany, 18 January 2024
RAPIDO@HiPEAC
Lilia Zaourar, Daniel Chillet, Daniel Gracia Pérez, Morteza Biglari-Abhari, Réda Nouacer, Matthias Jung, Gianluca Palermo
2024 J jnl
Towards Sustainable Electronic Design Automation Flow: A Joint Approach Based on Complexity Metrics.
WiPiEC Journal
Virginie Delalot, Chouki Aktouf, Gilles Fritz, Bastien Gratreaux, Nermine Ali, Lilia Zaourar
2023 — conf
A Hypergraph Model and Associated Optimization Strategies for Path Length-Driven Netlist Partitioning.
ICCS (3)
Julien Rodriguez, François Galea, François Pellegrini, Lilia Zaourar
2023 C conf
A-DECA: An Automated Design Space Exploration Approach for Computing Architectures to Develop Efficient High-Performance Many-Core Processors.
DSD
Lilia Zaourar, Alice Chillet, Jean-Marc Philippe
2023 C conf
Improving Integrated Circuit Security Using Mathematical Model Based on Clique Covering Reformulation.
CoDIT
Jonathan Fontaine, Mohamed Benazouz, Lilia Zaourar, Roselyne Chotin
2023 C conf
Path Length-Driven Hypergraph Partitioning: An Integer Programming Approach.
FedCSIS
Julien Rodriguez, François Galea, François Pellegrini, Lilia Zaourar
2022 — conf
Decoupling processor and memory hierarchy simulators for efficient design space exploration.
DroneSE/RAPIDO@HiPEAC
Fatma Jebali, Oumaima Matoussi, Arief Wicaksana, Amir Charif, Lilia Zaourar
2021 — conf
Co-simulation of a Model Predictive Control System for Automotive Applications.
SEFM Workshops
Cinzia Bernardeschi, Pierpaolo Dini, Andrea Domenici, Ayoub Mouhagir, Maurizio Palmieri, Sergio Saponara, Tanguy Sassolas, Lilia Zaourar
2021 — conf
Multilevel simulation-based co-design of next generation HPC microprocessors.
PMBS
Lilia Zaourar, Mohamed Benazouz, Ayoub Mouhagir, Fatma Jebali, Tanguy Sassolas, Jean-Christophe Weill, Carlos Falquez, Nam Ho, Dirk Pleiter, Antoni Portero, Estela Suarez, Polydoros Petrakis, Vassilis Papaefstathiou, Manolis Marazakis, Milan Radulovic, Francesc Martínez, Adrià Armejach, Marc Casas, Alejandro Nocua, Romain Dolbeau
2020 B conf
Cross-level Co-simulation and Verification of an Automatic Transmission Control on Embedded Processor.
SEFM
Cinzia Bernardeschi, Andrea Domenici, Maurizio Palmieri, Sergio Saponara, Tanguy Sassolas, Arief Wicaksana, Lilia Zaourar
2020 J jnl
Efficient algorithm for scheduling parallel applications on hybrid multicore machines with communications delays and energy constraint.
Concurr. Comput. Pract. Exp.
Massinissa Ait Aba, Lilia Zaourar, Alix Munier
2020 C conf
Polynomial Scheduling Algorithm for Parallel Applications on Hybrid Platforms.
ISCO
Massinissa Ait Aba, Lilia Zaourar, Alix Munier
2018 — conf
Approximation Algorithm for Scheduling Applications on Hybrid Multi-core Machines with Communications Delays.
IPDPS Workshops
Massinissa Ait Aba, Lilia Zaourar, Alix Munier
2018 — conf
Multi-start simulated annealing for partially-reconfigurable FPGA floorplanning.
IPDPS Workshops
François Galea, Sergiu Carpov, Lilia Zaourar
2018 J jnl
Task management on fully heterogeneous micro-server system: Modeling and resolution strategies.
Concurr. Comput. Pract. Exp.
Lilia Zaourar, Massinissa Ait Aba, David Briand, Jean-Marc Philippe
2017 — conf
Approximation Algorithm for Scheduling a Chain of Tasks on Heterogeneous Systems.
Euro-Par Workshops
Massinissa Ait Aba, Lilia Zaourar, Alix Munier
2017 — conf
Modeling of Applications and Hardware to Explore Task Mapping and Scheduling Strategies on a Heterogeneous Micro-Server System.
IPDPS Workshops
Lilia Zaourar, Massinissa Ait Aba, David Briand, Jean-Marc Philippe
2016 — conf
3DIP: An iterative partitioning tool for monolithic 3D IC.
3DIC
Guillaume Berhault, Melanie Brocard, Sébastien Thuries, François Galea, Lilia Zaourar
2015 — ch.
Applying Operations Research to Design for Test Insertion Problems.
Computational Intelligence in Digital and Network Designs and Applications
Yann Kieffer, Lilia Zaourar
2013 J jnl
Cache-aware static scheduling for hard real-time multicore systems based on communication affinities.
CoRR
Lilia Zaourar, Mathieu Jan, Maurice Pitel
2012 J jnl
A Graph-Based Approach to Optimal Scan Chain Stitching Using RTL Design Descriptions.
VLSI Design
Lilia Zaourar, Yann Kieffer, Chouki Aktouf
2011 — conf
A Global Optimization for Scan Chain Insertion at the RT-level.
ISVLSI
Lilia Zaourar, Yann Kieffer, Chouki Aktouf
2011 C conf
A multi-objective optimization for memory BIST sharing using a genetic algorithm.
IOLTS
Lilia Zaourar, Yann Kieffer, Arnaud Wenzel
2011 — conf
An Innovative Methodology for Scan Chain Insertion and Analysis at RTL.
Asian Test Symposium
Lilia Zaourar, Yann Kieffer, Chouki Aktouf
2010 B conf
A shared BIST optimization methodology for memory test.
ETS
Lilia Zaourar, Jihane Alami Chentoufi, Yann Kieffer, Arnaud Wenzel, Frederic Grandvaux
2010 — —
Recherche opérationnelle et optimisation pour la conception testable de circuits intégrés complexes. (-).
Lilia Zaourar