Liji Wu - RankMe

74 papers A 2C 21Journal 21Unranked 30

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	An Input Recovery Side-Channel Attack on Dnn Accelerator with Three-Dimensional Power Surface. HOST Le Wu, Liji Wu, Zhiwei Ba, Xiangmin Zhang
2025	J	`jnl`	Catch the Star: Weight Recovery Attack Using Side-Channel Star Map Against DNN Accelerator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Le Wu, Liji Wu, Xiangmin Zhang
2025	J	`jnl`	Comparative Deep Learning-Based Side-Channel Analysis of an FPGA-Based CRYSTALS-Kyber NTT Accelerator. Cryptogr. Munkhbaatar Chinbat, Liji Wu, Xiangmin Zhang, Yifan Yang, Man Wei
2025	A	`conf`	Grafted Trees Bear Better Fruit: An Improved Multiple-Valued Plaintext-Checking Side-Channel Attack Against Kyber. DATE Jinnuo Li, Chi Cheng, Muyan Shen, Peng Chen, Qian Guo, Dongsheng Liu, Liji Wu, Jian Weng
2025	J	`jnl`	PEAR: privacy-preserving and effective aggregation for byzantine-robust federated learning in real-world scenarios. Comput. J. Han Sun, Yan Zhang, Huiping Zhuang, Jiatong Li, Zhen Xu, Liji Wu
2024	J	`jnl`	A Design of Fault-Tolerant Battery Monitoring IC for Electric Vehicles Complying With ISO 26262. IEEE Open J. Circuits Syst. Byambajav Ragchaa, Liji Wu, Xiangmin Zhang
2024	J	`jnl`	Dual-Rail Precharge Logic-Based Side-Channel Countermeasure for DNN Systolic Array. IEEE Trans. Very Large Scale Integr. Syst. Le Wu, Liji Wu, Xiangmin Zhang, Munkhbaatar Chinbat
2024	J	`jnl`	Grafted Trees Bear Better Fruit: An Improved Multiple-Valued Plaintext-Checking Side-Channel Attack against Kyber. IACR Cryptol. ePrint Arch. Jinnuo Li, Chi Cheng, Muyan Shen, Peng Chen, Qian Guo, Dongsheng Liu, Liji Wu, Jian Weng
2023	—	`conf`	A High-precision Current Detection Circuit for Battery Management System. ASICON PuSen Wu, Liji Wu, Hao Xue, Zhenhui Zhang, Byambajav Ragchaa, Xiangmin Zhang
2021	J	`jnl`	Gini-Impurity Index Analysis. IEEE Trans. Inf. Forensics Secur. Ye Yuan, Liji Wu, Xiangmin Zhang
2020	J	`jnl`	An ultra-low-power 5GHz front end with feedforward body bias LNA and single to double balance subharmonic mixer topology for direct conversion receiver. IEICE Electron. Express Dongquan Huo, Luhong Mao, Liji Wu, Xiangmin Zhang
2020	—	`conf`	Hardware Trojan Detection Combines with Machine Learning: an Isolation Forest-based Detection Method. BigDataSE Taifeng Hu, Liji Wu, Xiangmin Zhang, Zhaopo Liao
2019	J	`jnl`	Correlation power attack on a message authentication code based on SM3. Frontiers Inf. Technol. Electron. Eng. Ye Yuan, Kaige Qu, Liji Wu, Jia-Wei Ma, Xiangmin Zhang
2019	J	`jnl`	Erratum to "A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism". Secur. Commun. Networks Ye Yuan, Liji Wu, Yijun Yang, Xiangmin Zhang
2019	—	`conf`	Hardware Implementation Based on Contact IC Card Scalar Multiplication. CSPS Feng Liang, Yanzhao Yin, Zhenhui Zhang, Liji Wu, Xiangmin Zhang
2019	—	`conf`	Research on Temperature Characteristics of IoT Chip Hardware Trojan Based on FPGA. CSPS Junru An, Zhiwei Cui, Zhenhui Zhang, Liji Wu, Xiangmin Zhang
2018	J	`jnl`	A Novel Multiple-Bits Collision Attack Based on Double Detection with Error-Tolerant Mechanism. Secur. Commun. Networks Ye Yuan, Liji Wu, Yijun Yang, Xiangmin Zhang
2018	—	`conf`	An Improved Cross-Coupled NAND Gates PUF for Bank IC Card. ICCSP Uyangaa Khuchit, Yonghong Bai, Liji Wu, Xiangmin Zhang
2017	—	`conf`	A 25Gb/s serial-link repeater with receiver equalization and transmitter de-emphasis in 0.13μm SiGe BiCMOS. MWSCAS Shuai Yuan, Liji Wu, Ziqiang Wang, Chun Zhang, Zhihua Wang, Hanjun Jiang
2017	C	`conf`	A 50Gb/s repeater and 2 × 50Gb/s 27-1 PRBS generator. ISCAS Dengrong Li, Liji Wu, Shuai Yuan, Xiangmin Zhang
2017	—	`conf`	An efficient HMAC processor based on the SHA-3 HASH function. ASICON Junhui Li, Liji Wu, Xiangmin Zhang
2017	C	`conf`	Side Channel Attack on SM4 Algorithm with Ensemble Method. CIS Mengmeng Xu, Liji Wu, Xiangmin Zhang
2016	J	`jnl`	A 70 mW 25 Gb/s Quarter-Rate SerDes Transmitter and Receiver Chipset With 40 dB of Equalization in 65 nm CMOS Technology. IEEE Trans. Circuits Syst. I Regul. Pap. Shuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Chun Zhang, Zhihua Wang
2016	—	`conf`	A High Precision Multi-Cell Battery Voltage Detecting Circuit for Battery Management Systems. VTC Spring Xue-Cheng Man, Liji Wu, Xiangmin Zhang, Tai-Kun Ma, Wen Jia
2016	C	`conf`	A Novel Method of Correlation Power Analysis on SM4 Hardware Implementation. CIS Sulong Tang, Liji Wu, Xiangmin Zhang, Xingjun Wu, Beibei Wang
2016	J	`jnl`	A new zero value attack combined fault sensitivity analysis on masked AES. Microprocess. Microsystems Qian Wang, An Wang, Liji Wu, Jiliang Zhang
2016	C	`conf`	Research on Side Channel Attack for USB Key. CIS Qingshuang Han, Liji Wu, Xiangmin Zhang
2015	—	`conf`	A 125KHz low frequency power recovery circuit for battery-less TPMS SoC. ASICON Yi Wang, Liji Wu, Zhi-Yuan Tu, Xiangmin Zhang, Wen Jia
2015	—	`conf`	A 48mW 15-to-28Gb/s source-synchronous receiver with adaptive DFE using hybrid alternate clock scheme and baud-rate CDR in 65nm CMOS. ESSCIRC Shuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Peng Wang, Wen Jia, Chun Zhang, Zhihua Wang
2015	—	`conf`	A 4×20-Gb/s 0.86pJ/b/lane 2-tap-FFE source-series-terminated transmitter with far-end crosstalk cancellation and divider-less clock generation in 65nm CMOS. CICC Shuai Yuan, Liji Wu, Ziqiang Wang, Xuqiang Zheng, Wen Jia, Chun Zhang, Zhihua Wang
2015	C	`conf`	A Novel Detection Algorithm for Ring Oscillator Network Based Hardware Trojan Detection with Tactful FPGA Implementation. CIS Kaige Qu, Liji Wu, Xiangmin Zhang
2015	C	`conf`	A Template Attack-Resistant Masking Scheme for RC4 Based on FPGA. CIS Shaohui Zhang, Liji Wu, Xiangmin Zhang, Xingjun Wu, Xiangyu Li, Huajun Fang
2015	J	`jnl`	A high-performance elliptic curve cryptographic coprocessor with side channel analysis countermeasures for smart IC card. IEICE Electron. Express Xiaowei Han, Beibei Wang, Liji Wu, An Wang
2015	J	`jnl`	A novel bit scalable leakage model based on genetic algorithm. Secur. Commun. Networks Zhenbin Zhang, Liji Wu, An Wang, Zhaoli Mu, Xiangmin Zhang
2015	—	`conf`	A novel oscillator-based TRNG for smart IC card. ASICON Xiaoyan Jia, Liji Wu, Beibei Wang, Xiangmin Zhang
2015	J	`jnl`	Double Sieve Collision Attack Based on Bitwise Detection. KSII Trans. Internet Inf. Syst. Yanting Ren, Liji Wu, An Wang
2015	J	`jnl`	Efficient collision attacks on smart card implementations of masked AES. Sci. China Inf. Sci. An Wang, Zongyue Wang, Xuexin Zheng, Xiaomei Wang, Man Chen, Guoshuang Zhang, Liji Wu
2015	C	`conf`	Software Hardware Co-design for Side-Channel Analysis Platform on Security Chips. CIS Qian Lei, Liji Wu, Shaohui Zhang, Xiangmin Zhang, Xiangyu Li, Liyang Pan, Zhimeng Dong
2015	—	`conf`	Template attack on masking AES based on fault sensitivity analysis. HOST Qian Wang, An Wang, Liji Wu, Gang Qu, Guoshuang Zhang
2015	A	`conf`	Transient-Steady Effect Attack on Block Ciphers. CHES Yanting Ren, An Wang, Liji Wu
2014	J	`jnl`	A 4.8-mW/Gb/s 9.6-Gb/s 5 + 1-Lane Source-Synchronous Transmitter in 65-nm Bulk CMOS. IEEE Trans. Circuits Syst. II Express Briefs Shuai Yuan, Ziqiang Wang, Xuqiang Zheng, Ke Huang, Ni Xu, Woogeun Rhee, Liji Wu, Chun Zhang
2014	C	`conf`	A Novel Subspace Template Attack Based on Symmetric Cross Entropy Criterion. CIS Fei Song, Liji Wu, An Wang, Xinyu Zhao
2014	C	`conf`	A Novel Template Attack on wNAF Algorithm of ECC. CIS Zhenbin Zhang, Liji Wu, Zhaoli Mu, Xiangmin Zhang
2014	C	`conf`	Adaptive Chosen-Plaintext Correlation Power Analysis. CIS Wenjing Hu, Liji Wu, An Wang, Xinjun Xie, Zhihui Zhu, Shun Luo
2014	C	`conf`	Algorithm-Based Countermeasures against Power Analysis Attacks for Public-Key Cryptography SM2. CIS Xiaowei Han, Beibei Wang, An Wang, Liji Wu, Woogeun Rhee
2014	C	`conf`	Design of a Masked S-Box for SM4 Based on Composite Field. CIS Hao Liang, Liji Wu, Xiangmin Zhang, Jiabin Wang
2014	C	`conf`	Hardware Design and Implementation of SM3 Hash Algorithm for Financial IC Card. CIS Ye Hu, Liji Wu, An Wang, Beibei Wang
2014	J	`jnl`	Improved Leakage Model Based on Genetic Algorithm. IACR Cryptol. ePrint Arch. Zhenbin Zhang, Liji Wu, An Wang, Zhaoli Mu
2014	C	`conf`	Scalable behavior modeling for SCR based ESD protection structures for circuit simulation. ISCAS Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Fei Lu, Albert Z. Wang, Xin Wang, Jian Liu, Siqiang Fan, He Tang, Baoyong Chi, Liji Wu, Tianling Ren
2014	C	`conf`	Wavelet-Based Noise Reduction in Power Analysis Attack. CIS Wei Liu, Liji Wu, Xiangmin Zhang, An Wang
2013	J	`jnl`	A 10 Gbps in-line network security processor based on configurable hetero-multi-cores. J. Zhejiang Univ. Sci. C Yun Niu, Liji Wu, Yang Liu, Xiangmin Zhang, Hong Yi Chen
2013	—	`conf`	A 10-Gb/s simplified transceiver with a quarter-rate 4-tap decision feedback equalizer in 0.18-μm CMOS technology. ASICON Shuai Yuan, Ziqiang Wang, Xuqiang Zheng, Ke Huang, Liji Wu, Zhihua Wang
2013	—	`conf`	A 10Gbps in-line Network Security Processor with a 32-bit embedded CPU. WOCC Jie Bai, Liji Wu, Niu Yun, Yang Liu, Xiangmin Zhang
2013	—	`conf`	A novel ESD device for Whole-Chip ESD protection network of TPMS mixed signal SoC. ASICON Ningyuan Yin, Liji Wu, Tengfei Zhai, Xiangmin Zhang, Rui Zhu
2013	—	`conf`	A security vulnerability of Java Card on array access in financial system. WOCC Jiang-pei Xu, Liji Wu, Xiang-jun Yang, Yu-zhong Wang, Xiangmin Zhang
2013	J	`jnl`	An IPSec Accelerator Design for a 10Gbps In-Line Security Network Processor. J. Comput. Yun Niu, Liji Wu, Xiangmin Zhang
2013	—	`conf`	Design and implementation of RSA for dual interface bank IC card. ASICON Jiajia Shao, Liji Wu, Xiangmin Zhang
2013	—	`conf`	Design of 13.56MHz power recovery circuit with signal transmission for contactless bank IC card. ASICON Yang Li, Liji Wu, Xiangmin Zhang
2013	C	`conf`	Efficient Countermeasures against Fault Attacks for 3DES Crypto Engine in Bank IC Card. CIS Qian Wang, Liji Wu, Xiangmin Zhang, Xiangyu Li, Jun Guo
2013	—	`conf`	Mixed-signal SoC design and low power research for tire pressure monitoring systems. ASICON Yangyang Guo, Liji Wu, Tengfei Zhai, Xiao Yu, Xiangmin Zhang
2013	—	`conf`	Power analysis attacks on wireless sensor nodes using CPU smart card. WOCC Yanting Ren, Liji Wu
2012	—	`conf`	A Battery-less Tire Pressure Monitoring System. ICCVE Liji Wu, Xiangmin Zhang, Xiao Yu, Xuyang Ding, Chaojun Chi
2012	C	`conf`	A High-Speed SHA-1 IP Core for 10 Gbps Ethernet Security Processor. CIS Yang Liu, Liji Wu, Yun Niu, Xiangmin Zhang, Zhiqiang Gao
2012	C	`conf`	Design and Implementation of a Fault Attack Platform for Smart IC Card. CIS Jun Guo, Liji Wu, Xiangming Zhang, Xiangyu Li
2012	C	`conf`	Design of Monitor and Protect Circuits against FIB Attack on Chip Security. CIS Mengmeng Ling, Liji Wu, Xiangyu Li, Xiangmin Zhang, Jinsong Hou, Yong Wang
2011	C	`conf`	A Configurable IPSec Processor for High Performance In-Line Security Network Processor. CIS Yun Niu, Liji Wu, Li Wang, Xiangmin Zhang, Jun Xu
2011	—	`conf`	A Low Power LDO Design for Battery-Less TPMS. ICFCE Wenli Yang, Liji Wu, Chen Jia, Xiangmin Zhang
2011	—	`conf`	A low-power 433MHz transmitter for battery-less Tire Pressure Monitoring System. ASICON Jinyu Zhu, Liji Wu, Xiangmin Zhang, Chen Jia, Chun Zhang
2011	—	`conf`	A passive UHF tag for RFID-based train axle temperature measurement system. CICC Jianqin Qian, Chun Zhang, Liji Wu, Xijin Zhao, Dingguo Wei, Zhihao Jiang, Yuhui He
2011	C	`conf`	Design and Implementation of an Electromagnetic Analysis System for Smart Cards. CIS Kun Gu, Liji Wu, Xiangyu Li, Xiangxin Zhang
2011	—	`conf`	Design and implementation of a low Power Java Coprocessor for dual-interface IC Bank Card. ASICON Junwei He, Liji Wu, Xiangmin Zhang
2011	—	`conf`	New power rail ESD clamp design with current starving technology. ASICON Bo Li, Liji Wu, Xiangmin Zhang
2011	—	`conf`	Reflection analysis of signal transmission in 32-bit CPU based SiP. ASICON Zerong Tao, Liji Wu, Xiangmin Zhang
2011	—	`conf`	Research on testing of 32-bit CPU based SiP. ASICON Chunlin Xie, Liji Wu, Xiangmin Zhang