Lien-Fei Chen

18 papers A 2C 2Misc 1Journal 5Unranked 8
YearRankTypeTitle / Venue / Authors
2016 J jnl
A 0.5 nJ/Pixel 4 K H.265/HEVC Codec LSI for Multi-Format Smartphone Applications.
IEEE J. Solid State Circuits
Chi-Cheng Ju, Tsu-Ming Liu, Kun-Bin Lee, Yung-Chang Chang, Han-Liang Chou, Chih-Ming Wang, Tung-Hsing Wu, Hue-Min Lin, Yi-Hsin Huang, Chia-Yun Cheng, Ting-An Lin, Chun-Chia Chen, Yu-Kun Lin, Min-Hao Chiu, Wei-Cing Li, Sheng-Jen Wang, Yen-Chieh Lai, Ping Chao, Chih-Da Chien, Meng-Jye Hu, Peng-Hao Wang, Yen-Chao Huang, Shun-Hsiang Chuang, Lien-Fei Chen, Hsiu-Yi Lin, Ming-Long Wu, Che-Hong Chen
2015 — conf
18.6 A 0.5nJ/pixel 4K H.265/HEVC codec LSI for multi-format smartphone applications.
ISSCC
Chi-Cheng Ju, Tsu-Ming Liu, Kun-Bin Lee, Yung-Chang Chang, Han-Liang Chou, Chih-Ming Wang, Tung-Hsing Wu, Hue-Min Lin, Yi-Hsin Huang, Chia-Yun Cheng, Ting-An Lin, Chun-Chia Chen, Yu-Kun Lin, Min-Hao Chiu, Wei-Cing Li, Sheng-Jen Wang, Yen-Chieh Lai, Ping Chao, Chih-Da Chien, Meng-Jye Hu, Peng-Hao Wang, Fu-Chun Yeh, Yen-Chao Huang, Shun-Hsiang Chuang, Lien-Fei Chen, Hsiu-Yi Lin, Ming-Long Wu, Che-Hong Chen, Ryan Chen, H. Y. Hsu, Kevin Jou
2010 J jnl
A memory interleaving and interlacing architecture for deblocking filter in H.264/AVC.
IEEE Trans. Consumer Electron.
Yeong-Kang Lai, Lien-Fei Chen, Wei-Che Chiou
2010 J jnl
Hybrid parallel motion estimation architecture based on fast top-winners search algorithm.
IEEE Trans. Consumer Electron.
Yeong-Kang Lai, Lien-Fei Chen, Shien-Yu Huang
2009 J jnl
A high-performance and memory-efficient VLSI architecture with parallel scanning method for 2-D lifting-based discrete wavelet transform.
IEEE Trans. Consumer Electron.
Yeong-Kang Lai, Lien-Fei Chen, Yui-Chih Shih
2009 C conf
Hardware Efficient Coarse-to-fine Fast Algorithm for H.264/AVC Variable Block Size Motion Estimation.
ISCAS
Lien-Fei Chen, Shien-Yu Huang, Chi-Yao Liao, Yeong-Kang Lai
2009 Misc conf
Model-based early termination scheme for H.264/AVC inter prediction.
ICASSP
Lien-Fei Chen, Shin-Ping Yang, Yeong-Kang Lai
2008 C conf
A high-speed 2-D transform architecture with unique kernel for multi-standard video applications.
ISCAS
Chong-Yu Huang, Lien-Fei Chen, Yeong-Kang Lai
2008 A conf
Analysis and architecture design of multi-transform architecture for H.264/AVC intra frame coder.
ICME
Lien-Fei Chen, Kun-Hsing Li, Chong-Yu Huang, Yeong-Kang Lai
2008 A conf
Hybrid parallel motion estimation architecture based on fast Pel-subsampling algorithm.
ICME
Yeong-Kang Lai, Lien-Fei Chen, Tian-En Hsieh, Shien-Yu Huang
2006 J jnl
A Cost Effective Interconnection Network for Reconfigurable Computing Processor in Digital Signal Processing Applications.
IEICE Trans. Electron.
Yeong-Kang Lai, Lien-Fei Chen, Jian-Chou Chen, Chun-Wei Chiu
2006 — conf
Analysis and Architecture Design for Memory Efficient Parallel Embedded Block Coding Architecture in JPEG 2000.
ICASSP (3)
Lien-Fei Chen, Tai-Lun Huang, Tzau-Min Chou, Yeong-Kang Lai
2005 — conf
A two-way SIMD-based reconfigurable computing architecture for multimedia applications.
ISCAS (5)
Yeong-Kang Lai, Lien-Fei Chen, Jian-Chou Chen, Chun-Wei Chiu
2005 — conf
Memory analysis and throughput enhancement for cost effective bit-plane coder in JPEG2000 applications.
ICASSP (5)
Lien-Fei Chen, Tai-Lun Huang, Yeong-Kang Lai
2004 — conf
A novel memoryless AES cipher architecture for networking applications.
ISCAS (4)
Yeong-Kang Lai, Li-Chung Chang, Lien-Fei Chen, Chih-Chung Chou, Chun-Wei Chiu
2004 — conf
A performance-driven configurable motion estimator for full-search block-matching algorithm.
ISCAS (2)
Yeong-Kang Lai, Lien-Fei Chen
2004 — conf
VLSI architecture of the reconfigurable computing engine for digital signal processing applications.
ISCAS (2)
Lien-Fei Chen, Yeong-Kang Lai
2003 — conf
A high data-reuse architecture with double-slice processing for full-search block-matching algorithm.
ISCAS (2)
Yeong-Kang Lai, Lien-Fei Chen