Liang-Hung Lu

32 papers C 1Misc 3Journal 18Unranked 10
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Tri-Band Two-Stage LNA With Simultaneous Linearity and Gain Enhancement for WiFi.
IEEE Trans. Very Large Scale Integr. Syst.
Teng-Shen Yang, Liang-Hung Lu
2025 J jnl
A 28-GHz CMOS Power Amplifier With Adaptive Bias and Phase Compensation for Gain and Phase Linearity Enhancement.
IEEE Trans. Circuits Syst. II Express Briefs
Liang-Chen Tsai, Zheng-Jie Li, Liang-Hung Lu
2023 J jnl
A 2.4-GHz Ring-VCO-Based Sub-Sampling PLL With a -70-dBc Reference Spur by Adopting a Capacitor-Multiplier-Based Sub-Sampling DLL.
IEEE Trans. Circuits Syst. I Regul. Pap.
Teng-Shen Yang, Huai-Yuan Hsieh, Liang-Hung Lu
2019 J jnl
A 40.4-dB Range, 0.73-dB Step, and 0.07-dB Error Programmable Gain Amplifier Using Gain Error Shifting Technique.
IEEE Trans. Circuits Syst. II Express Briefs
Lin-Sen Wang, Po-Chih Ku, Po-Ting Ko, Chi-Jung Chung, Liang-Hung Lu
2018 J jnl
A Concurrent Dual-Band and Dual-Mode Frequency Synthesizer for Radar Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Yu-Kai Tsai, Yi-Keng Hsieh, Hung-Yu Tsai, Huan-Sheng Chen, Liang-Hung Lu
2018 J jnl
A High-Voltage DAC-Based Transmitter for Coded Signals in High Frequency Ultrasound Imaging Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Po-Chih Ku, Kuan-Yu Shih, Liang-Hung Lu
2017 — conf
A 0.3-V 7.6-fJ/conv-step delta-sigma time-to-digital converter with a gated-free ring oscillator.
NEWCAS
Chih-Kai Chang, Yu-Kai Tsai, Kai-Han Cheng, Liang-Hung Lu
2017 — conf
A 2.4-GHz dual-mode resizing power amplifier with a constant conductance output matching.
SoCC
Wei-Lun Ou, Yu-Kai Tsai, Po-Yen Tseng, Liang-Hung Lu
2017 J jnl
A 51.3-MHz 21.8-ppm/°C CMOS Relaxation Oscillator With Temperature Compensation.
IEEE Trans. Circuits Syst. II Express Briefs
Yu-Kai Tsai, Liang-Hung Lu
2015 — conf
A 5.2-GHz full-integrated RF front-end by T/R switch, LNA, and PA co-design with 3.2-dB NF and +25.9-dBm output power.
A-SSCC
Huan-Sheng Chen, Hung-Yu Tsai, Li-Xuan Chuo, Yu-Kai Tsai, Liang-Hung Lu
2015 J jnl
An Analog On-Line Gain Calibration Loop for RF Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yi-Keng Hsieh, Ya-Ru Wu, Po-Chih Ku, Liang-Hung Lu
2014 Misc conf
A built-in gain calibration technique for RF low-noise amplifiers.
VTS
Ya-Ru Wu, Yi-Keng Hsieh, Po-Chih Ku, Liang-Hung Lu
2013 J jnl
50 mV-Input Batteryless Boost Converter for Thermal Energy Harvesting.
IEEE J. Solid State Circuits
Po-Shuan Weng, Hao-Yen Tang, Po-Chih Ku, Liang-Hung Lu
2013 — conf
A wideband programmable-gain amplifier for 60GHz applications in 65nm CMOS.
VLSI-DAT
Yi-Keng Hsieh, Hsieh-Hung Hsieh, Liang-Hung Lu
2012 — conf
A fully electrical startup batteryless boost converter with 50mV input voltage for thermoelectric energy harvesting.
VLSIC
Hao-Yen Tang, Po-Shuan Weng, Po-Chih Ku, Liang-Hung Lu
2011 J jnl
Experimental 5-GHz RF Frontends for Ultra-Low-Voltage and Ultra-Low-Power Operations.
IEEE Trans. Very Large Scale Integr. Syst.
Hsieh-Hung Hsieh, Huan-Sheng Chen, Ping-Hsi Hung, Liang-Hung Lu
2010 J jnl
A Low-Power Quadrature VCO and Its Application to a 0.6-V 2.4-GHz PLL.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chung-Ting Lu, Hsieh-Hung Hsieh, Liang-Hung Lu
2010 J jnl
An Amorphous-Silicon Operational Amplifier and Its Application to a 4-Bit Digital-to-Analog Converter.
IEEE J. Solid State Circuits
Yi-Chuan Tarn, Po-Chih Ku, Hsieh-Hung Hsieh, Liang-Hung Lu
2009 J jnl
A V-Band CMOS VCO With an Admittance-Transforming Cross-Coupled Pair.
IEEE J. Solid State Circuits
Hsieh-Hung Hsieh, Liang-Hung Lu
2007 J jnl
40-Gb/s High-Gain Distributed Amplifiers With Cascaded Gain Stages in 0.18-µm CMOS.
IEEE J. Solid State Circuits
Jun-Chau Chien, Liang-Hung Lu
2007 — conf
40GHz Wide-Locking-Range Regenerative Frequency Divider and Low-Phase-Noise Balanced VCO in 0.18μm CMOS.
ISSCC
Jun-Chau Chien, Liang-Hung Lu
2007 — conf
40Gb/s High-Gain Distributed Amplifiers with Cascaded Gain Stages in 0.18μm CMOS.
ISSCC
Jun-Chau Chien, Liang-Hung Lu
2007 J jnl
A 10-Gb/s Inductorless CMOS Limiting Amplifier With Third-Order Interleaving Active Feedback.
IEEE J. Solid State Circuits
Huei-Yan Huang, Jun-Chau Chien, Liang-Hung Lu
2007 — conf
A BIST Technique for RF Voltage-Controlled Oscillators.
ATS
Hsieh-Hung Hsieh, Yen-Chih Huang, Liang-Hung Lu, Guo-Wei Huang
2007 Misc conf
A Low-Noise Amplifier with Integrated Current and Power Sensors for RF BIST Applications.
VTS
Yen-Chih Huang, Hsieh-Hung Hsieh, Liang-Hung Lu
2007 J jnl
Analysis and Design of Wideband Injection-Locked Ring Oscillators With Multiple-Input Injection.
IEEE J. Solid State Circuits
Jun-Chau Chien, Liang-Hung Lu
2007 J jnl
Design of Wide-Tuning-Range Millimeter-Wave CMOS VCO With a Standing-Wave Architecture.
IEEE J. Solid State Circuits
Jun-Chau Chien, Liang-Hung Lu
2006 Misc conf
Integrated CMOS Power Sensors for RF BIST Applications.
VTS
Hsieh-Hung Hsieh, Liang-Hung Lu
2005 — conf
A 45.6-GHz matrix distributed amplifier in 0.18-nm CMOS.
CICC
Tai-Yuan Chen, Jun-Chau Chien, Liang-Hung Lu
2004 J jnl
A 4-91-GHz traveling-wave amplifier in a standard 0.12-μm SOI CMOS microprocessor technology.
IEEE J. Solid State Circuits
Jean-Olivier Plouchart, Jonghae Kim, Noah Zamdmer, Liang-Hung Lu, Melanie Sherony, Yue Tan, Robert A. Groves, Robert Trzcinski, Mohamed Talbi, Asit Ray, Lawrence F. Wagner
2003 — conf
A 4-91 GHz distributed amplifier in a standard 0.12 μm SOI CMOS microprocessor technology.
CICC
Jean-Olivier Plouchart, Jonghae Kim, Noah Zamdmer, Liang-Hung Lu, Melanie Sherony, Yue Tan, Robert A. Groves, Robert Trzcinski, Mohamed Talbi, Asit Ray, Lawrence F. Wagner
1994 C conf
The Design of the CMOS Current-Mode General-Purpose Analog Processor.
ISCAS
Liang-Hung Lu, Chung-Yu Wu