Li-Ming Denq

13 papers A* 1A 1Journal 4Unranked 7
YearRankTypeTitle / Venue / Authors
2012 — conf
3D-IC BISR for stacked memories using cross-die spares.
VLSI-DAT
Chun-Chuan Chi, Yung-Fa Chou, Ding-Ming Kwai, Yu-Ying Hsiao, Cheng-Wen Wu, Yu-Tsao Hsing, Li-Ming Denq, Tsung-Hsiang Lin
2011 J jnl
A Memory Built-In Self-Repair Scheme Based on Configurable Spares.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mincent Lee, Li-Ming Denq, Cheng-Wen Wu
2011 A* conf
A low-cost wireless interface with no external antenna and crystal oscillator for cm-range contactless testing.
DAC
Chin-Fu Li, Chi-Ying Lee, Chen-Hsing Wang, Shu-Lin Chang, Li-Ming Denq, Chun-Chuan Chi, Hsuan-Jung Hsu, Ming-Yi Chu, Jing-Jia Liou, Shi-Yu Huang, Po-Chiun Huang, Hsi-Pin Ma, Jenn-Chyou Bor, Cheng-Wen Wu, Ching-Cheng Tien, Chi-Hu Wang, Yung-Sheng Kuo, Chih-Tsun Huang, Tien-Yu Chang
2010 J jnl
Economic Analysis of the HOY Wireless Test Methodology.
IEEE Des. Test Comput.
Yu-Tsao Hsing, Li-Ming Denq, Chao-Hsun Chen, Cheng-Wen Wu
2010 J jnl
SOC Test Architecture and Method for 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chih-Yen Lo, Yu-Tsao Hsing, Li-Ming Denq, Cheng-Wen Wu
2009 J jnl
Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories.
IEEE Des. Test Comput.
Li-Ming Denq, Yu-Tsao Hsing, Cheng-Wen Wu
2008 — conf
Area and Test Cost Reduction for On-Chip Wireless Test Channels with System-Level Design Techniques.
ATS
Chun-Kai Hsu, Li-Ming Denq, Mao-Yin Wang, Jing-Jia Liou, Chih-Tsun Huang, Cheng-Wen Wu
2007 — conf
A Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories.
ATS
Li-Ming Denq, Cheng-Wen Wu
2007 — conf
A prototype of a wireless-based test system.
SoCC
Jing-Jia Liou, Chih-Tsun Huang, Cheng-Wen Wu, Ching-Cheng Tien, Chi-Hu Wang, Hsi-Pin Ma, Ying-Yen Chen, Yueh-Chih Hsu, Li-Ming Denq, Chien-Jung Chiu, Young-Wey Li, Chieh-Ming Chang
2006 — conf
An Enhanced SRAM BISR Design with Reduced Timing Penalty.
ATS
Li-Ming Denq, Tzu-chiang Wang, Cheng-Wen Wu
2004 — conf
A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories.
MTDT
Li-Ming Denq, Rei-Fu Huang, Cheng-Wen Wu, Yeong-Jar Chang, Wen Ching Wu
2004 A conf
An SOC Test Integration Platform and Its Industrial Realization.
ITC
Kuo-Liang Cheng, Jing-Reng Huang, Chih-Wea Wang, Chih-Yen Lo, Li-Ming Denq, Chih-Tsun Huang, Shin-Wei Hung, Jye-Yuan Lee
2003 — conf
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories.
MTDT
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu Li