Levent Aksoy

69 papers A* 2A 8B 1C 13Journal 27Unranked 18
YearRankTypeTitle / Venue / Authors
2025 A conf
Late Breaking Results: Is Reconfigurable-Based Obfuscation Secure?
DATE
Zain Ul Abideen, Levent Aksoy, Samuel Pagliarini
2025 J jnl
RESAA: A Removal and Structural Analysis Attack Against Compound Logic Locking.
IEEE Trans. Very Large Scale Integr. Syst.
Felipe Almeida, Levent Aksoy, Samuel Pagliarini
2024 — conf
CAC 2.0: A Corrupt and Correct Logic Locking Technique Resilient to Structural Analysis Attacks.
LATS
Levent Aksoy, Muhammad Yasin, Samuel Pagliarini
2024 J jnl
CAC 2.0: A Corrupt and Correct Logic Locking Technique Resilient to Structural Analysis Attacks.
CoRR
Levent Aksoy, Muhammad Yasin, Samuel Pagliarini
2024 A conf
KRATT: QBF-Assisted Removal and Structural Analysis Attack Against Logic Locking.
DATE
Levent Aksoy, Muhammad Yasin, Samuel Pagliarini
2024 B conf
Multiplierless Design of High-Speed Very Large Constant Multiplications.
ASPDAC
Levent Aksoy, Debapriya Basu Roy, Malik Imran, Samuel Pagliarini
2024 J jnl
RESAA: A Removal and Structural Analysis Attack Against Compound Logic Locking.
CoRR
Felipe Almeida, Levent Aksoy, Samuel Pagliarini
2023 J jnl
Hybrid Protection of Digital FIR Filters.
CoRR
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2023 J jnl
Hybrid Protection of Digital FIR Filters.
IEEE Trans. Very Large Scale Integr. Syst.
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2023 J jnl
KRATT: QBF-Assisted Removal and Structural Analysis Attack Against Logic Locking.
CoRR
Levent Aksoy, Muhammad Yasin, Samuel Pagliarini
2023 J jnl
Multiplierless Design of High-Speed Very Large Constant Multiplications.
CoRR
Levent Aksoy, Debapriya Basu Roy, Malik Imran, Samuel Pagliarini
2023 — conf
Resynthesis-based Attacks Against Logic Locking.
ISQED
Felipe Almeida, Levent Aksoy, Quang-Linh Nguyen, Sophie Dupuis, Marie-Lise Flottes, Samuel Pagliarini
2023 J jnl
Resynthesis-based Attacks Against Logic Locking.
CoRR
Felipe Almeida, Levent Aksoy, Quang-Linh Nguyen, Sophie Dupuis, Marie-Lise Flottes, Samuel Pagliarini
2022 C conf
Hardware Obfuscation of Digital FIR Filters.
DDECS
Levent Aksoy, Alexander Hepp, Johanna Baehr, Samuel Pagliarini
2022 J jnl
Hardware Obfuscation of Digital FIR Filters.
CoRR
Levent Aksoy, Alexander Hepp, Johanna Baehr, Samuel Pagliarini
2022 J jnl
Multiplierless Design of Very Large Constant Multiplications in Cryptography.
CoRR
Levent Aksoy, Debapriya Basu Roy, Malik Imran, Patrick Karl, Samuel Pagliarini
2022 J jnl
Multiplierless Design of Very Large Constant Multiplications in Cryptography.
IEEE Trans. Circuits Syst. II Express Briefs
Levent Aksoy, Debapriya Basu Roy, Malik Imran, Patrick Karl, Samuel Pagliarini
2022 J jnl
Technology Development and Modeling of Switching Lattices Using Square and H Shaped Four-Terminal Switches.
IEEE Trans. Emerg. Top. Comput.
Nihat Akkan, Serzat Safaltin, Levent Aksoy, Ismail Cevik, Herman Sedef, Csaba Andras Moritz, Mustafa Altun
2021 C conf
High-level Intellectual Property Obfuscation via Decoy Constants.
IOLTS
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2021 J jnl
High-level Intellectual Property Obfuscation via Decoy Constants.
CoRR
Levent Aksoy, Quang-Linh Nguyen, Felipe Almeida, Jaan Raik, Marie-Lise Flottes, Sophie Dupuis, Samuel Pagliarini
2021 J jnl
Realization of Logic Functions Using Switching Lattices Under a Delay Constraint.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Levent Aksoy, Nihat Akkan, Herman Sedef, Mustafa Altun
2021 — conf
Side-Channel Attacks on Triple Modular Redundancy Schemes.
ATS
Felipe Almeida, Levent Aksoy, Jaan Raik, Samuel Pagliarini
2021 J jnl
Side-Channel Attacks on Triple Modular Redundancy Schemes.
CoRR
Felipe Almeida, Levent Aksoy, Jaan Raik, Samuel Pagliarini
2020 C conf
A Novel Method for the Realization of Complex Logic Functions using Switching Lattices.
ISCAS
Levent Aksoy, Mustafa Altun
2020 A conf
CMOS Implementation of Switching Lattices.
DATE
Ismail Cevik, Levent Aksoy, Mustafa Altun
2020 — conf
Efficient Hardware Implementation of Artificial Neural Networks Using Approximate Multiply-Accumulate Blocks.
ISVLSI
Mohammadreza Esmali Nojehdeh, Levent Aksoy, Mustafa Altun
2020 C conf
Efficient Time-Multiplexed Realization of Feedforward Artificial Neural Networks.
ISCAS
Levent Aksoy, Sajjad Parvin, Mohammadreza Esmali Nojehdeh, Mustafa Altun
2020 J jnl
Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices.
IEEE Trans. Computers
Levent Aksoy, Mustafa Altun
2019 A conf
A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices.
DATE
Levent Aksoy, Mustafa Altun
2019 A conf
Realization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling.
DATE
Serzat Safaltin, Oguz Gencer, Muhammed Ceylan Morgül, Levent Aksoy, Sebahattin Gurmen, Csaba Andras Moritz, Mustafa Altun
2016 J jnl
A novel method for the approximation of multiplierless constant matrix vector multiplication.
EURASIP J. Embed. Syst.
Levent Aksoy, Paulo F. Flores, José Monteiro
2015 C conf
A Novel Method for the Approximation of Multiplierless Constant Matrix Vector Multiplication.
EUC
Levent Aksoy, Paulo F. Flores, José Monteiro
2015 C conf
Approximation of multiple constant multiplications using minimum look-up tables on FPGA.
ISCAS
Levent Aksoy, Paulo F. Flores, José Monteiro
2015 J jnl
Exact and Approximate Algorithms for the Filter Design Optimization Problem.
IEEE Trans. Signal Process.
Levent Aksoy, Paulo F. Flores, José Monteiro
2014 J jnl
A Tutorial on Multiplierless Design of FIR Filters: Algorithms and Architectures.
Circuits Syst. Signal Process.
Levent Aksoy, Paulo F. Flores, José Monteiro
2014 C conf
ECHO: A novel method for the multiplierless design of constant array vector multiplication.
ISCAS
Levent Aksoy, Paulo F. Flores, José Monteiro
2014 C conf
Efficient design of FIR filters using hybrid multiple constant multiplications on FPGA.
ICCD
Levent Aksoy, Paulo F. Flores, José Monteiro
2014 J jnl
Multiplierless Design of Folded DSP Blocks.
ACM Trans. Design Autom. Electr. Syst.
Levent Aksoy, Paulo F. Flores, José Monteiro
2014 A conf
Optimization of design complexity in time-multiplexed constant multiplications.
DATE
Levent Aksoy, Paulo F. Flores, José Monteiro
2013 J jnl
Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool.
IEEE Trans. Very Large Scale Integr. Syst.
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2013 — conf
Exploration of tradeoffs in the design of integer cosine transforms for image compression.
ECCTD
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2013 — conf
SIREN: a depth-first search algorithm for the filter design optimization problem.
ACM Great Lakes Symposium on VLSI
Levent Aksoy, Paulo F. Flores, José Monteiro
2013 C conf
Towards the least complex time-multiplexed constant multiplication.
VLSI-SoC
Levent Aksoy, Paulo F. Flores, José Monteiro
2012 A conf
Design of low-complexity digital finite impulse response filters on FPGAs.
DATE
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2012 J jnl
High-level algorithms for the optimization of gate-level area in digit-serial multiple constant multiplications.
Integr.
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2012 A conf
Multiple tunable constant multiplications: Algorithms and applications.
ICCAD
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2012 J jnl
Optimization Algorithms for the Multiplierless Realization of Linear Transforms.
ACM Trans. Design Autom. Electr. Syst.
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011 C conf
A hybrid algorithm for the optimization of area and delay in linear DSP transforms.
VLSI-SoC
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011 — conf
Design of low-power multiple constant multiplications using low-complexity minimum depth operations.
ACM Great Lakes Symposium on VLSI
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011 — conf
Efficient shift-adds design of digit-serial multiple constant multiplications.
ACM Great Lakes Symposium on VLSI
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2011 J jnl
Finding the optimal tradeoff between area and delay in multiple constant multiplications.
Microprocess. Microsystems
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011 — conf
Multiplierless Design of Linear DSP Transforms.
VLSI-SoC (Selected Papers)
Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2011 C conf
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level.
ISCAS
Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2011 — conf
Optimization of gate-level area in high throughput Multiple Constant Multiplications.
ECCTD
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2010 C conf
Design of low-complexity and high-speed digital Finite Impulse Response filters.
VLSI-SoC
Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paulo F. Flores, José Monteiro
2010 J jnl
Optimally Solving the MCM Problem Using Pseudo-Boolean Satisfiability
CoRR
Nuno P. Lopes, Levent Aksoy, Vasco Manquinho, José Monteiro
2010 C conf
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications.
DSD
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2010 — conf
Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach.
ICECS
Sidinei Ghissoni, Eduardo Costa, Cristiano Lazzari, José Monteiro, Levent Aksoy, Ricardo Reis
2010 J jnl
Search algorithms for the multiple constant multiplications problem: Exact and approximate.
Microprocess. Microsystems
Levent Aksoy, Ece Olcay Günes, Paulo F. Flores
2009 — conf
Design of low complexity digital FIR filters.
SBCCI
Levent Aksoy, Diego Jaccottet, Eduardo Costa
2008 — conf
An approximate algorithm for the multiple constant multiplications problem.
SBCCI
Levent Aksoy, Ece Olcay Günes
2008 — conf
Area optimization algorithms in high-speed digital FIR filter synthesis.
SBCCI
Levent Aksoy, Ece Olcay Günes
2008 J jnl
Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2007 — conf
Effect of Number Representation on the Achievable Minimum Number of Operations in Multiple Constant Multiplications.
SiPS
Levent Aksoy, Ece Olcay Günes, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2007 — conf
Minimum number of operations under a general number representation for digital filter synthesis.
ECCTD
Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2007 A* conf
Optimization of Area in Digital FIR Filters using Gate-Level Metrics.
DAC
Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2006 — conf
ASSUMEs: Heuristic Algorithms for Optimization of Area and Delay in Digital Filter Synthesis.
ICECS
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2006 A* conf
Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming.
DAC
Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2005 — conf
An Evolutionary Local Search Algorithm for the Satisfiability Problem.
TAINN
Levent Aksoy, Ece Olcay Günes