Lesley Shannon

87 papers A* 1A 12B 10C 4Misc 11Journal 25Unranked 22

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Automated Verilog Assertion Generation Using Fine-Tuned LLMs with Subtask-Specific Iterative Prompting. ISQED Mohammad Shahidzadeh, Behnam Ghavami, Steven J. E. Wilton, Lesley Shannon
2024	C	`conf`	A Semi Black-Box Adversarial Bit- Flip Attack with Limited DNN Model Information. ICCD Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton
2024	J	`jnl`	A Semi Black-Box Adversarial Bit-Flip Attack with Limited DNN Model Information. CoRR Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton
2024	J	`jnl`	Automatic High-quality Verilog Assertion Generation through Subtask-Focused Fine-Tuned LLMs and Iterative Prompting. CoRR Mohammad Shahidzadeh, Behnam Ghavami, Steve Wilton, Lesley Shannon
2024	—	`conf`	Boosting Multiple Multipliers Packing on FPGA DSP Blocks via Truncation and Compensation-based Approximation. ISVLSI Behnam Ghavami, Mahdi Sajadi, Lesley Shannon, Steve Wilton
2024	—	`conf`	DNN Memory Footprint Reduction via Post-Training Intra-Layer Multi-Precision Quantization. ISQED Behnam Ghavami, Amin Kamjoo, Lesley Shannon, Steve Wilton
2024	J	`jnl`	DNN Memory Footprint Reduction via Post-Training Intra-Layer Multi-Precision Quantization. CoRR Behnam Ghavami, Amin Kamjoo, Lesley Shannon, Steve Wilton
2024	J	`jnl`	Designing an IEEE-Compliant FPU that Supports Configurable Precision for Soft Processors. ACM Trans. Reconfigurable Technol. Syst. Chris Keilbart, Yuhui Gao, Martin Chua, Eric Matthews, Steven J. E. Wilton, Lesley Shannon
2024	—	`conf`	TableCache: An Open-Source, Configurable, Last-Level Cache for FPGA Systems. ICFPT Chris Keilbart, Lesley Shannon
2024	C	`conf`	ZOBNN: Zero-Overhead Dependable Design of Binary Neural Networks with Deliberately Quantized Parameters. IOLTS Behnam Ghavami, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton
2024	J	`jnl`	ZOBNN: Zero-Overhead Dependable Design of Binary Neural Networks with Deliberately Quantized Parameters. CoRR Behnam Ghavami, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton
2023	J	`jnl`	A Cycle-Accurate Soft Error Vulnerability Analysis Framework for FPGA-based Designs. CoRR Eduardo Rhod, Behnam Ghavami, Zhenman Fang, Lesley Shannon
2023	Misc	`conf`	Designing a configurable IEEE-compliant FPU that supports variable precision for soft processors. FCCM Chris Keilbart, Yuhui Gao, Martin Chua, Eric Matthews, Steven J. E. Wilton, Lesley Shannon
2023	J	`jnl`	Unraveling the Integration of Deep Machine Learning in FPGA CAD Flow: A Concise Survey and Future Insights. CoRR Behnam Ghavami, Lesley Shannon
2022	C	`conf`	A Majority-based Approximate Adder for FPGAs. DSD Behnam Ghavami, Mahdi Sajedi, Mohsen Raji, Zhenman Fang, Lesley Shannon
2022	C	`conf`	Blind Data Adversarial Bit-flip Attack against Deep Neural Networks. DSD Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Zhenman Fang, Lesley Shannon
2022	J	`jnl`	Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking. ACM Trans. Reconfigurable Technol. Syst. Alec Lu, Zhenman Fang, Lesley Shannon
2022	A	`conf`	FitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions. DATE Behnam Ghavami, Mani Sadati, Zhenman Fang, Lesley Shannon
2022	J	`jnl`	Introduction to Special Section on FPGA 2020. ACM Trans. Reconfigurable Technol. Syst. Lesley Shannon
2022	J	`jnl`	Quick-Div: Rethinking Integer Divider Design for FPGA-based Soft-processors. ACM Trans. Reconfigurable Technol. Syst. Eric Matthews, Alec Lu, Zhenman Fang, Lesley Shannon
2022	—	`conf`	Stealthy Attack on Algorithmic-Protected DNNs via Smart Bit Flipping. ISQED Behnam Ghavami, Seyd Movi, Zhenman Fang, Lesley Shannon
2021	J	`jnl`	BDFA: A Blind Data Adversarial Bit-flip Attack on Deep Neural Networks. CoRR Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Zhenman Fang, Lesley Shannon
2021	A	`conf`	Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers through Microbenchmarking. FPGA Alec Lu, Zhenman Fang, Weihua Liu, Lesley Shannon
2021	A	`ed.`	FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28 - March 2, 2021 FPGA Lesley Shannon, Michael Adler
2021	J	`jnl`	FPGA Computing. IEEE Micro Maya B. Gokhale, Lesley Shannon
2021	J	`jnl`	FitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions. CoRR Behnam Ghavami, Mani Sadati, Zhenman Fang, Lesley Shannon
2021	A	`conf`	LEAP: A Deep Learning based Aging-Aware Architecture Exploration Framework for FPGAs. FPGA Behnam Ghavami, Seyed Milad Ebrahimi, Zhenman Fang, Lesley Shannon
2021	B	`conf`	MAPLE: A Machine Learning based Aging-Aware FPGA Architecture Exploration Framework. FPL Behnam Ghavami, Milad Ibrahimipour, Zhenman Fang, Lesley Shannon
2021	J	`jnl`	SeaPlace: Process Variation Aware Placement for Reliable Combinational Circuits against SETs and METs. CoRR Kiarash Saremi, Hossein Pedram, Behnam Ghavami, Mohsen Raji, Zhenman Fang, Lesley Shannon
2021	J	`jnl`	Stealthy Attack on Algorithmic-Protected DNNs via Smart Bit Flipping. CoRR Behnam Ghavami, Seyd Movi, Zhenman Fang, Lesley Shannon
2020	A	`conf`	Aadam: A Fast, Accurate, and Versatile Aging-Aware Cell Library Delay Model using Feed-Forward Neural Network. ICCAD Seyed Milad Ebrahimipour, Behnam Ghavami, Hamid Mousavi, Mohsen Raji, Zhenman Fang, Lesley Shannon
2020	—	`conf`	CHIP-KNN: A Configurable and High-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs. FPT Alec Lu, Zhenman Fang, Nazanin Farahpour, Lesley Shannon
2020	Misc	`conf`	Exploring Writeback Designs for Efficiently Leveraging Parallel-Execution Units in FPGA-Based Soft-Processors. FCCM Eric Matthews, Yuhui Gao, Lesley Shannon
2020	A	`ed.`	FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020 FPGA Stephen Neuendorffer, Lesley Shannon
2019	J	`jnl`	Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration. IEEE Trans. Very Large Scale Integr. Syst. Mohammad A. Usmani, Shahrzad Keshavarz, Eric Matthews, Lesley Shannon, Russell Tessier, Daniel E. Holcomb
2019	Misc	`conf`	Rethinking Integer Divider Design for FPGA-Based Soft-Processors. FCCM Eric Matthews, Alec Lu, Zhenman Fang, Lesley Shannon
2019	—	`conf`	Revisiting Deep Learning Parallelism: Fine-Grained Inference Engine Utilizing Online Arithmetic. FPT Ameer M. S. Abdelhadi, Lesley Shannon
2018	Misc	`conf`	Evaluating the Performance Efficiency of a Soft-Processor, Variable-Length, Parallel-Execution-Unit Architecture for FPGAs Using the RISC-V ISA. FCCM Eric Matthews, Zavier Aguila, Lesley Shannon
2018	B	`conf`	Modular Block-RAM-Based Longest-Prefix Match Ternary Content-Addressable Memories. FPL Ameer M. S. Abdelhadi, Guy G. F. Lemieux, Lesley Shannon
2017	A	`conf`	Performance impacts and limitations of hardware memory access trace collection. DATE Nicholas C. Doyle, Eric Matthews, Graham M. Holland, Alexandra Fedorova, Lesley Shannon
2017	B	`conf`	TAIGA: A new RISC-V soft-processor framework enabling high performance CPU architectural features. FPL Eric Matthews, Lesley Shannon
2016	—	`conf`	A multi-beam Scan Mode Synthetic Aperture Radar processor suitable for satellite operation. ASAP Mohammad Reza Mohammadnia, Lesley Shannon
2016	J	`jnl`	Shared Memory Multicore MicroBlaze System with SMP Linux Support. ACM Trans. Reconfigurable Technol. Syst. Eric Matthews, Lesley Shannon, Alexandra Fedorova
2016	—	`ch.`	Systems-on-Chip on FPGAs. FPGAs for Software Programmers Jeffrey B. Goeders, Graham M. Holland, Lesley Shannon, Steven J. E. Wilton
2015	A	`conf`	Design Space Exploration of L1 Data Caches for FPGA-Based Multiprocessor Systems. FPGA Eric Matthews, Nicholas C. Doyle, Lesley Shannon
2015	J	`jnl`	Performance monitoring for multicore embedded computing systems on FPGAs. CoRR Lesley Shannon, Eric Matthews, Nicholas C. Doyle, Alexandra Fedorova
2015	Misc	`conf`	Technology Scaling in FPGAs: Trends in Applications and Architectures. FCCM Lesley Shannon, Veronica Cojocaru, Cong Nguyen Dao, Philip Heng Wai Leong
2014	A	`conf`	A methodology for identifying and placing heterogeneous cluster groups based on placement proximity data (abstract only). FPGA Farnaz Gharibian, Lesley Shannon, Peter Jamieson
2014	B	`conf`	Identifying and placing heterogeneously-sized cluster groupings based on FPGA placement data. FPL Farnaz Gharibian, Lesley Shannon, Peter Jamieson
2013	J	`jnl`	Analyzing System-Level Information's Correlation to FPGA Placement. ACM Trans. Reconfigurable Technol. Syst. Farnaz Gharibian, Lesley Shannon, Peter Jamieson, Kevin Chung
2013	B	`conf`	Supergenes in a genetic algorithm for heterogeneous FPGA placement. IEEE Congress on Evolutionary Computation Peter Jamieson, Farnaz Gharibian, Lesley Shannon
2012	A*	`conf`	Amoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory Hierarchy. MICRO Snehasish Kumar, Hongzhou Zhao, Arrvindh Shriraman, Eric Matthews, Sandhya Dwarkadas, Lesley Shannon
2012	B	`conf`	Bio-inspired walking: A FPGA multicore system for a legged robot. FPL Michael Henrey, Sean Edmond, Lesley Shannon, Carlo Menon
2012	J	`jnl`	Guest Editorial: Field-Programmable Technology. J. Signal Process. Syst. Lesley Shannon, Oliver Diessel, Neil W. Bergmann
2012	J	`jnl`	Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation. ACM Trans. Embed. Comput. Syst. Cindy Mark, Scott Y. L. Chin, Lesley Shannon, Steven J. E. Wilton
2012	—	`conf`	Minimizing the error: A study of the implementation of an Integer Split-Radix FFT on an FPGA for medical imaging. FPT Mohammad Reza Mohammadnia, Lesley Shannon
2012	B	`conf`	Polyblaze: From one to many bringing the microblaze into the multicore era with Linux SMP support. FPL Eric Matthews, Lesley Shannon, Alexandra Fedorova
2011	—	`conf`	Evaluating the scalability of high-performance, Fourier-Domain Optical Coherence Tomography on GPGPUs and FPGAs. ACSCC Lesley Shannon, Jian Li, Mohammad Reza Mohammadnia, Marinko Sarunic
2011	—	`conf`	Exploring FPGA technology mapping for fracturable LUT minimization. FPT David Dickin, Lesley Shannon
2011	—	`conf`	FPGA Framework for Agent Systems Using Dynamic Partial Reconfiguration. HoloMAS Edward Chen, Victor Gusev Lesau, Dorian Sabaz, Lesley Shannon, William A. Gruver
2011	Misc	`conf`	FUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators. FCCM Aws Ismail, Lesley Shannon
2011	J	`jnl`	Leveraging reconfigurability in the hardware/software codesign process. ACM Trans. Reconfigurable Technol. Syst. Lesley Shannon, Paul Chow
2011	Misc	`conf`	Scalable, High Performance Fourier Domain Optical Coherence Tomography: Why FPGAs and Not GPGPUs. FCCM Jian Li, Marinko Sarunic, Lesley Shannon
2010	—	`conf`	A configurable framework for investigating workload execution. FPT Eric Matthews, Lesley Shannon, Alexandra Fedorova
2010	—	`conf`	Customizing controller instruction sets for application-specific architectures. ASAP Jian Li, David Dickin, Lesley Shannon
2010	J	`jnl`	EuTOPIA: Facilitating Processor-Based DPR Systems for non-DPR Experts. J. Next Gener. Inf. Technol. Edward Chen, William A. Gruver, Lesley Shannon, Dorian Sabaz
2010	B	`conf`	Finding System-Level Information and Analyzing Its Correlation to FPGA Placement. FPL Farnaz Gharibian, Lesley Shannon, Peter Jamieson
2010	Misc	`conf`	Odin II - An Open-Source Verilog HDL Synthesis Tool for CAD Research. FCCM Peter Jamieson, Kenneth B. Kent, Farnaz Gharibian, Lesley Shannon
2010	A	`conf`	Predicting the performance of application-specific NoCs implemented on FPGAs. FPGA Jason Lee, Lesley Shannon
2009	—	`ed.`	Proceedings of the 2009 International Conference on Field-Programmable Technology, FPT 2009, Sydney, Australia, December 9-11, 2009 FPT Neil W. Bergmann, Oliver Diessel, Lesley Shannon
2008	—	`conf`	A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator. ASAP Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary F. Margrave
2008	—	`conf`	A new flexible PR domain model to replace the fixed multi-PR region model for DPR systems. FPT Edward Chen, Dorian Sabaz, William A. Gruver, Lesley Shannon
2008	—	`conf`	An on-chip testbed that emulates runtime traffic and reduces design verification time for FPGA designs. FPT Wayne Chen, Lesley Shannon
2008	—	`conf`	Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms. ASAP David Dickin, Lesley Shannon
2008	Misc	`conf`	Facilitating Processor-Based DPR Systems for non-DPR Experts. FCCM Edward Chen, William A. Gruver, Dorian Sabaz, Lesley Shannon
2007	—	`conf`	A Multiprocessor System-on-Chip Implementation of a Laser-based Transparency Meter on an FPGA. FPT James Dykes, Paulman Chan, Glenn H. Chapman, Lesley Shannon
2007	J	`jnl`	Routability of Network Topologies in FPGAs. IEEE Trans. Very Large Scale Integr. Syst. Manuel Saldaña, Lesley Shannon, Jia Shuo Yue, Sikang Bian, John Craig, Paul Chow
2007	J	`jnl`	SIMPPL: An Adaptable SoC Framework Using a Programmable Controller IP Interface to Facilitate Design Reuse. IEEE Trans. Very Large Scale Integr. Syst. Lesley Shannon, Paul Chow
2006	B	`conf`	A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification. FPL Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow
2006	A	`conf`	The routability of multiprocessor network topologies in FPGAs. FPGA Manuel Saldaña, Lesley Shannon, Paul Chow
2006	—	`conf`	The routability of multiprocessor network topologies in FPGAs. SLIP Manuel Saldaña, Lesley Shannon, Paul Chow
2005	—	`conf`	Designing an FPGA SoC Using a Standardized IP Block Interface. FPT Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow
2005	B	`conf`	Leveraging Reconfigurability in the Design Process. FPL Lesley Shannon, Paul Chow
2005	Misc	`conf`	Simplifying the Integration of Processing Elements in Computing Systems Using a Programmable Controller. FCCM Lesley Shannon, Paul Chow
2004	—	`conf`	Maximizing system performance: using reconfigurability to monitor system communications. FPT Lesley Shannon, Paul Chow
2004	A	`conf`	Using reconfigurability to achieve real-time profiling for hardware/software codesign. FPGA Lesley Shannon, Paul Chow
2003	Misc	`conf`	Standardizing the Performance Assessment of Reconfigurable Processor Architectures. FCCM Lesley Shannon, Paul Chow