Leo Filippini

14 papers C 7Journal 2Unranked 5
YearRankTypeTitle / Venue / Authors
2024 C conf
Design Automation for Charge Recovery Logic.
ISCAS
Yilmaz Ege Gonul, Leo Filippini, Junghoon Oh, Ragh Kuttappa, Scott Lerner, Mineo Kaneko, Baris Taskin
2021 — conf
Scalable Resonant Power Clock Generation for Adiabatic Logic Design.
ISVLSI
Ragh Kuttappa, Leo Filippini, Nicholas Sica, Baris Taskin
2020 C conf
Comprehensive Low Power Adiabatic Circuit Design with Resonant Power Clocking.
ISCAS
Ragh Kuttappa, Steven Khoa, Leo Filippini, Vasil Pano, Baris Taskin
2019 C conf
Low Swing - Low Frequency Rotary Traveling Wave Oscillators.
ISCAS
Ragh Kuttappa, Scott Lerner, Leo Filippini, Baris Taskin
2019 J jnl
The Adiabatically Driven StrongARM Comparator.
IEEE Trans. Circuits Syst. II Express Briefs
Leo Filippini, Baris Taskin
2018 C conf
A 900 MHz Charge Recovery Comparator With 40 fJ per Conversion.
ISCAS
Leo Filippini, Baris Taskin
2017 — conf
A charge recovery logic system bus.
SLIP
Leo Filippini, Baris Taskin
2017 — conf
Charge recovery implementation of an analog comparator: Initial results.
MWSCAS
Leo Filippini, Lunal Khuon, Baris Taskin
2017 C conf
Stability of Rotary Traveling Wave Oscillators under process variations and NBTI.
ISCAS
Ragh Kuttappa, Leo Filippini, Scott Lerner, Baris Taskin
2017 — conf
Wireless charge recovery system for implanted electroencephalography applications in mice.
ISQED
Leo Filippini, Diane Lim, Lunal Khuon, Baris Taskin
2016 C conf
Charge recovery logic for thermal harvesting applications.
ISCAS
Leo Filippini, Baris Taskin
2015 C conf
A wirelessly powered system with charge recovery logic.
ICCD
Leo Filippini, Emre Salman, Baris Taskin
2015 J jnl
FinFET-Based Low-Swing Clocking.
ACM J. Emerg. Technol. Comput. Syst.
Can Sitik, Emre Salman, Leo Filippini, Sung-Jun Yoon, Baris Taskin
2014 — conf
High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design.
ISVLSI
Can Sitik, Leo Filippini, Emre Salman, Baris Taskin