Lennart Bamberg

41 papers A* 1A 1C 2Journal 24Unranked 13
YearRankTypeTitle / Venue / Authors
2025 J jnl
Rescaling-Aware Training for Efficient Deployment of Deep Learning Models on Full-Integer Hardware.
CoRR
Lion Mueller, Alberto García Ortiz, Ardalan Najafi, Adam Fuks, Lennart Bamberg
2025 — conf
VUSA: Virtually Upscaled Systolic Array Architecture to Exploit Unstructured Sparsity in AI Acceleration.
MOCAST
Shereef Helal, Alberto García Ortiz, Lennart Bamberg
2025 J jnl
VUSA: Virtually Upscaled Systolic Array Architecture to Exploit Unstructured Sparsity in AI Acceleration.
CoRR
Shereef Helal, Alberto García Ortiz, Lennart Bamberg
2025 J jnl
eIQ Neutron: Redefining Edge-AI Inference with Integrated NPU and Compiler Innovations.
CoRR
Lennart Bamberg, Filippo Minnella, Roberto Bosio, Fabrizio Ottati, Yuebin Wang, Jongmin Lee, Luciano Lavagno, Adam Fuks
2024 J jnl
Exploiting Neural-Network Statistics for Low-Power DNN Inference.
IEEE Open J. Circuits Syst.
Lennart Bamberg, Ardalan Najafi, Alberto García Ortiz
2023 J jnl
Exploiting Neural-Network Statistics for Low-Power DNN Inference.
CoRR
Lennart Bamberg, Ardalan Najafi, Alberto García-Ortiz
2023 J jnl
Synapse Compression for Event-Based Convolutional-Neural-Network Accelerators.
IEEE Trans. Parallel Distributed Syst.
Lennart Bamberg, Arash Pourtaherian, Luc Waeijen, Anupam Chahar, Orlando Moreira
2022 C conf
ARTS: An adaptive regularization training schedule for activation sparsity exploration.
DSD
Zeqi Zhu, Arash Pourtaherian, Luc Waeijen, Lennart Bamberg, Egor Bondarev, Orlando Moreira
2022 J jnl
Ratatoskr: An Open-Source Framework for In-Depth Power, Performance, and Area Analysis and Optimization in 3D NoCs.
ACM Trans. Model. Comput. Simul.
Jan Moritz Joseph, Lennart Bamberg, Imad Hajjar, Behnam Razi Perjikolaei, Alberto García-Ortiz, Thilo Pionteck
2021 — conf
Bridging the Frequency Gap in Heterogeneous 3D SoCs through Technology-Specific NoC Router Architectures.
ASP-DAC
Jan Moritz Joseph, Lennart Bamberg, Geonhwa Jeong, Ruei-Ting Chien, Rainer Leupers, Alberto García-Ortiz, Tushar Krishna, Thilo Pionteck
2021 J jnl
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors.
IEEE Trans. Very Large Scale Integr. Syst.
Lingjun Zhu, Lennart Bamberg, Sai Surya Kiran Pentapati, Kyungwook Chang, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García-Ortiz, Sung Kyu Lim
2021 — conf
NEWROMAP: mapping CNNs to NoC-interconnected self-contained data-flow accelerators for edge-AI.
NOCS
Jan Moritz Joseph, Murat Sezgin Baloglu, Yue Pan, Rainer Leupers, Lennart Bamberg
2021 J jnl
Synapse Compression for Event-Based Convolutional-Neural-Network Accelerators.
CoRR
Lennart Bamberg, Arash Pourtaherian, Luc Waeijen, Anupam Chahar, Orlando Moreira
2021 — conf
Technology-aware Router Architectures for On-Chip-Networks in Heterogeneous Technologies.
NANOCOM
Lennart Bamberg, Tushar Krishna, Jan Moritz Joseph
2020 J jnl
Heterogeneous 3D Integration for a RISC-V System With STT-MRAM.
IEEE Comput. Archit. Lett.
Lingjun Zhu, Lennart Bamberg, Anthony Agnesina, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Julien Ryckaert, Alberto García-Ortiz, Sung Kyu Lim
2020 A conf
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs.
DATE
Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
2020 J jnl
Misalignment-aware energy modeling of narrow buses for data encoding schemes.
Integr.
Amir Najafi, Lennart Bamberg, Alberto García Ortiz
2019 — conf
A Coding Approach to Improve the Energy Efficiency of Approximate NoCs.
ReCoSoC
Amir Najafi, Lennart Bamberg, Guillermo Payá Vayá, Alberto García Ortiz
2019 J jnl
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology.
IEEE Micro
Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim
2019 — conf
Area Optimization with Non-Linear Models in Core Mapping for System-on-Chips.
MOCAST
Jan Moritz Joseph, Dominik Ermel, Tobias Drewes, Lennart Bamberg, Alberto García-Ortiz, Thilo Pionteck
2019 J jnl
Coding-Based Low-Power Through-Silicon-Via Redundancy Schemes for Heterogeneous 3-D SoCs.
IEEE Trans. Very Large Scale Integr. Syst.
Lennart Bamberg, Alberto García Ortiz
2019 J jnl
Crosstalk optimization for through-silicon vias by exploiting temporal signal misalignment.
Integr.
Lennart Bamberg, Jan Moritz Joseph, Thilo Pionteck, Alberto García Ortiz
2019 J jnl
Edge effect aware low-power crosstalk avoidance technique for 3D integration.
Integr.
Lennart Bamberg, Amir Najafi, Alberto García Ortiz
2019 J jnl
Integer-Value Encoding for Approximate On-Chip Communication.
IEEE Access
Amir Najafi, Lennart Bamberg, Ardalan Najafi, Alberto García Ortiz
2019 J jnl
NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures.
IEEE Access
Jan Moritz Joseph, Lennart Bamberg, Dominik Ermel, Behnam Razi Perjikolaei, Anna Drewes, Alberto García Ortiz, Thilo Pionteck
2019 J jnl
NoCs in Heterogeneous 3D SoCs: Co-Design of Routing Strategies and Microarchitectures.
CoRR
Jan Moritz Joseph, Lennart Bamberg, Dominik Ermel, Behnam Razi Perjikolaei, Anna Drewes, Alberto García-Ortiz, Thilo Pionteck
2019 J jnl
Ratatoskr: An open-source framework for in-depth power, performance and area analysis in 3D NoCs.
CoRR
Jan Moritz Joseph, Lennart Bamberg, Imad Hajjar, Behnam Razi Perjikolaei, Alberto García Ortiz, Thilo Pionteck
2019 J jnl
Simulation environment for link energy estimation in networks-on-chip with virtual channels.
Integr.
Jan Moritz Joseph, Lennart Bamberg, Imad Hajjar, Robert Schmidt, Thilo Pionteck, Alberto García Ortiz
2019 C conf
System-Level Optimization of Network-on-Chips for Heterogeneous 3D System-on-Chips.
ICCD
Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg, Alberto García Ortiz, Thilo Pionteck
2019 J jnl
System-level optimization of Network-on-Chips for heterogeneous 3D System-on-Chips.
CoRR
Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg, Alberto García Ortiz, Thilo Pionteck
2018 A* conf
Coding approach for low-power 3D interconnects.
DAC
Lennart Bamberg, Robert Schmidt, Alberto García Ortiz
2018 — conf
Coding-aware Link Energy Estimation for 2D and 3D Networks-on-Chip with Virtual Channels.
PATMOS
Lennart Bamberg, Jan Moritz Joseph, Robert Schmidt, Thilo Pionteck, Alberto García Ortiz
2018 J jnl
Edge effects on the TSV array capacitances and their performance influence.
Integr.
Lennart Bamberg, Amir Najafi, Alberto García Ortiz
2018 — conf
Exploiting Temporal Misalignment to Optimize the Interconnect Performance for 3D Integration.
PATMOS
Lennart Bamberg, Alberto García Ortiz
2018 — conf
Misalignment-aware delay modeling of narrow on-chip interconnects considering variability.
MOCAST
Amir Najafi, Lennart Bamberg, Ardalan Najafi, Alberto García Ortiz
2018 — conf
Specification of Simulation Models for NoCs in Heterogeneous 3D SoCs.
ReCoSoC
Jan Moritz Joseph, Lennart Bamberg, Gerald Krell, Imad Hajjar, Alberto García Ortiz, Thilo Pionteck
2017 — conf
Design method for asymmetric 3D interconnect architectures with high level models.
ReCoSoC
Jan Moritz Joseph, Lennart Bamberg, Sven Wrieden, Dominik Ermel, Alberto García Ortiz, Thilo Pionteck
2017 — conf
Edge effect aware crosstalk avoidance technique for 3D integration.
PATMOS
Lennart Bamberg, Amir Najafi, Alberto García Ortiz
2017 J jnl
High-Level Energy Estimation for Submicrometric TSV Arrays.
IEEE Trans. Very Large Scale Integr. Syst.
Lennart Bamberg, Alberto García Ortiz
2017 J jnl
Low-Power Coding: Trends and New Challenges.
J. Low Power Electron.
Alberto García Ortiz, Lennart Bamberg, Amir Najafi
2016 — conf
Energy modeling of coupled interconnects including intrinsic misalignment effects.
PATMOS
Amir Najafi, Lennart Bamberg, Ardalan Najafi, Alberto García Ortiz