Lei Chen

15 papers A 5Unranked 10
YearRankTypeTitle / Venue / Authors
2024 — conf
Post-silicon Trace Signal Selection Using Genetic Algorithm.
ATS
Hanxu Feng, Yuanhang Bu, Jing Zhou, Shuo Wang, Zhuoli Wang, Lei Chen
2021 — conf
Research on agile FPGA fault injection system.
ICM
Yaowei Zhang, Lei Chen, Shuo Wang, Jing Zhou, Chunsheng Tian, Hanxu Feng
2017 — conf
Analyzing the Single Event Upset Sensitivity of Digital Clock Manager in Virtex-5 FPGA.
IEEA
Tingting Yu, Lei Chen, Xuewu Li, Shuo Wang, Jing Zhou
2016 — conf
A 3.75Gb/s CML output driver with configurable pre-emphasis in 65nm CMOS technology.
ICCIP
Yong Fu, Zhiping Wen, Lei Chen
2015 A conf
300 Thousand Gates Single Event Effect Hardened SRAM-based FPGA for Space Application (Abstract Only).
FPGA
Lei Chen, Yuanfu Zhao, Zhiping Wen, Jing Zhou, Xuewu Li, Yanlong Zhang, Huabo Sun
2015 A conf
A Novel Method for FPGA Test Based on Partial Reconfiguration and Sorting Algorithm (Abstract Only).
FPGA
Xianjian Zheng, Fan Zhang, Lei Chen, Zhiping Wen, Yuanfu Zhao, Xuewu Li
2014 A conf
Coordinating routing resources for hex pips test in island-style FPGAs (abstract only).
FPGA
Fan Zhang, Lei Chen, Wenyao Xu, Yuanfu Zhao, Zhiping Wen
2013 — conf
A configurable fault-tolerant glitch-free clock switching circuit.
MWSCAS
Haochi Wang, Yanlong Zhang, Xuewu Li, Lei Chen, Zhiping Wen, Kun Zhang, Min Wang
2013 A conf
Precision fault injection method based on correspondence between configuration bitstream and architecture (abstract only).
FPGA
Jing Zhou, Lei Chen, Shuo Wang
2012 — conf
An accurate fault location method based on configuration bitstream analysis.
NORCHIP
Jing Zhou, Zengrong Liu, Lei Chen, Shuo Wang, Zhiping Wen, Xun Chen, Chang Qi
2012 — conf
Study of an Automated Precise SEU Fault Injection Technique.
IPDPS Workshops
Jing Zhou, Zengrong Liu, Lei Chen, Shuo Wang, Zhiping Wen, Lishuai Wu, Xun Chen
2009 — conf
A Novel High-Density Single-Event Upset Hardened Configurable SRAM Applied to FPGA.
ReConFig
Lei Wang, Lei Chen, Zhiping Wen, Huabo Sun, Shuo Wang
2009 A conf
A novel BIST approach for testing input/output buffers in FPGAs.
FPGA
Lei Chen, Zhiquan Zhang, Zhiping Wen
2008 — conf
A novel configurable no dead-zone digital phase detector design.
APCCAS
Min Wang, Zhiping Wen, Lei Chen, Yanlong Zhang
2008 — conf
BIST approach for testing configurable logic and memory resources in FPGAs.
APCCAS
Zhiquan Zhang, Zhiping Wen, Lei Chen, Tao Zhou, Fan Zhang