Lee D. Coraor

25 papers A* 4B 2C 2Misc 3Journal 7Unranked 7
YearRankTypeTitle / Venue / Authors
2006 J jnl
Performance characterization of the dynamic programming obstacle detection algorithm.
IEEE Trans. Image Process.
Tarak Gandhi, Mau-Tsuen Yang, Rangachar Kasturi, Octavia I. Camps, Lee D. Coraor, Jeffrey McCandless
2002 J jnl
An architecture for a nondeterministic distributed simulator.
IEEE Trans. Veh. Technol.
Marc Bumble, Lee D. Coraor
2002 J jnl
Real-Time Implementation of Obstacle Detection Algorithms on a Datacube MaxPCI Architecture.
Real Time Imaging
Mau-Tsuen Yang, Tarak Gandhi, Rangachar Kasturi, Lee D. Coraor, Octavia I. Camps, Jeffrey McCandless
2000 A* conf
Detection of Obstacles in the Flight Path of an Aircraft.
CVPR
Tarak Gandhi, Mau-Tsuen Yang, Rangachar Kasturi, Octavia I. Camps, Lee D. Coraor, Jeffrey McCandless
2000 — conf
Exploring CORSIM Runtime Characteristics: Profiling a Traffic Simulator.
Annual Simulation Symposium
Marc Bumble, Lee D. Coraor, Lily Elefteriadou
1999 Misc conf
A global synchronization network for a non-deterministic simulation architecture.
WSC
Marc Bumble, Lee D. Coraor
1999 — conf
Computing in Memory Architectures for Digital Image Processing.
MTDT
Luke Roth, Lee D. Coraor, David L. Landis, Paul T. Hulina, Scott Deno
1999 C conf
Evaluation of Computing in Memory Architectures for Digital Image Processing Applications.
ICCD
David L. Landis, Paul T. Hulina, Scott Deno, Luke Roth, Lee D. Coraor
1999 C conf
Language-Based Rapid Prototyping Methods for Legacy System Re-Engineering and Re-Use.
IEEE International Workshop on Rapid System Prototyping
David L. Landis, Praveen Guddeti, Paul T. Hulina, Lee D. Coraor
1998 Misc conf
Architecture for a Non-deterministic Simulation Machine.
WSC
Marc Bumble, Lee D. Coraor
1998 — conf
Implementing Parallelism in Random Discrete Event-Driven Simulation.
IPPS/SPDP Workshops
Marc Bumble, Lee D. Coraor
1995 — conf
A comparative evaluation of software techniques to hide memory latency.
HICSS (1)
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee D. Coraor
1995 Misc conf
Improving Cache Performance in a Multiprocessor Environment.
PDPTA
Jong S. Park, Lee D. Coraor
1995 A* conf
Program Balance and Its Impact on High Performance RISC Architectures.
HPCA
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee D. Coraor
1994 J jnl
Memory Latency Effects in Decoupled Architectures.
IEEE Trans. Computers
Lizyamma Kurian, Paul T. Hulina, Lee D. Coraor
1994 — conf
Module Partitioning and Interlaced Data Placement Schemes to Reduce Conflicts in Interleaved Memories.
ICPP (1)
Lizyamma Kurian, Bermjae Choi, Paul T. Hulina, Lee D. Coraor
1994 — conf
Structured Data Access Mechanisms for a Decoupled Computer Architecture.
ICPP (2)
Ali Berrached, Paul T. Hulina, Lee D. Coraor
1992 J jnl
Design and VLSI implementation of an access processor for a decoupled architecture.
Microprocess. Microsystems
Paul T. Hulina, Lizyamma Kurian, Eugene B. John, Lee D. Coraor
1992 A* conf
Memory Latency Effects in Decoupled Architectures With a Single Data Memory Module.
ISCA
Lizyamma Kurian, Paul T. Hulina, Lee D. Coraor
1991 A* conf
Classification and Performance Evaluation of Instruction Buffering Techniques.
ISCA
Lizyamma Kurian, Paul T. Hulina, Lee D. Coraor, Dhamir N. Mannai
1991 — conf
Performance Analysis of an Address Generation Coprocessor.
ICPP (1)
Paul T. Hulina, Lee D. Coraor, Shih-Wei Sun
1990 J jnl
Coprocessor architectures for efficient address computation and memory accessing.
Comput. Syst. Sci. Eng.
Paul T. Hulina, Lee D. Coraor
1987 J jnl
A General Model for Memory-Based Finite-State Machines.
IEEE Trans. Computers
Lee D. Coraor, Paul T. Hulina, Orlando A. Morean
1987 B conf
A Hardware Memory Mapping Unit for Efficient Address Computation.
ICPP
Paul T. Hulina, Lee D. Coraor
1985 B conf
A Reconfigurable Multiprocessor.
ICPP
Lee D. Coraor, Paul T. Hulina