Lavanya Subramanian

32 papers A* 8A 1B 2C 1Journal 17Unranked 3

Year	Rank	Type	Title / Venue / Authors
2026	A*	`conf`	Publics, Place, and Sensors: Co-Designing Environmental Monitoring with a Community Orchard. CHI Dana Habeeb, Lavanya Subramanian, Rahul Devajji, Nick Polak
2024	—	`conf`	SlimSLAM: An Adaptive Runtime for Visual-Inertial Simultaneous Localization and Mapping. ASPLOS (3) Armand Behroozi, Yuxiang Chen, Vlad Fruchter, Lavanya Subramanian, Sriseshan Srikanth, Scott A. Mahlke
2023	J	`jnl`	FARSI: An Early-stage Design Space Exploration Framework to Tame the Domain-specific System-on-chip Complexity. ACM Trans. Embed. Comput. Syst. Behzad Boroujerdian, Ying Jing, Devashree Tripathy, Amit Kumar, Lavanya Subramanian, Luke Yen, Vincent Lee, Vivek Venkatesan, Amit Jindal, Robert Shearer, Vijay Janapa Reddi
2022	J	`jnl`	FARSI: Facebook AR System Investigator for Agile Domain-Specific System-on-Chip Exploration. CoRR Behzad Boroujerdian, Ying Jing, Amit Kumar, Lavanya Subramanian, Luke Yen, Vincent Lee, Vivek Venkatesan, Amit Jindal, Robert Shearer, Vijay Janapa Reddi
2020	A*	`conf`	GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis. MICRO Damla Senol Cali, Gurpreet S. Kalsi, Zülal Bingöl, Can Firtina, Lavanya Subramanian, Jeremie S. Kim, Rachata Ausavarungnirun, Mohammed Alser, Juan Gómez-Luna, Amirali Boroumand, Anant Nori, Allison Scibisz, Sreenivas Subramoney, Can Alkan, Saugata Ghose, Onur Mutlu
2020	J	`jnl`	GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis. CoRR Damla Senol Cali, Gurpreet S. Kalsi, Zülal Bingöl, Can Firtina, Lavanya Subramanian, Jeremie S. Kim, Rachata Ausavarungnirun, Mohammed Alser, Juan Gómez-Luna, Amirali Boroumand, Anant Nori, Allison Scibisz, Sreenivas Subramoney, Can Alkan, Saugata Ghose, Onur Mutlu
2019	A	`conf`	GrandSLAm: Guaranteeing SLAs for Jobs in Microservices Execution Frameworks. EuroSys Ram Srivatsa Kannan, Lavanya Subramanian, Ashwin Raju, Jeongseob Ahn, Jason Mars, Lingjia Tang
2018	A*	`conf`	Closed yet open DRAM: achieving low latency and high performance in DRAM memory systems. DAC Lavanya Subramanian, Kaushik Vaidyanathan, Anant Nori, Sreenivas Subramoney, Tanay Karnik, Hong Wang
2018	J	`jnl`	High-Performance and Energy-Effcient Memory Scheduler Design for Heterogeneous Systems. CoRR Rachata Ausavarungnirun, Gabriel H. Loh, Lavanya Subramanian, Kevin K. Chang, Onur Mutlu
2018	J	`jnl`	Predictable Performance and Fairness Through Accurate Slowdown Estimation in Shared Main Memory Systems. CoRR Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, Onur Mutlu
2018	—	`conf`	Tackling memory access latency through DRAM row management. MEMSYS Sriseshan Srikanth, Lavanya Subramanian, Sreenivas Subramoney, Thomas M. Conte, Hong Wang
2018	J	`jnl`	Tiered-Latency DRAM: Enabling Low-Latency Main Memory at Low Cost. CoRR Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu
2017	—	`conf`	Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms. SIGMETRICS (Abstracts) Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu
2017	J	`jnl`	Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms. Proc. ACM Meas. Anal. Comput. Syst. Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu
2016	J	`jnl`	BLISS: Balancing Performance, Fairness and Complexity in Memory Access Scheduling. IEEE Trans. Parallel Distributed Syst. Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, Onur Mutlu
2016	J	`jnl`	DASH: Deadline-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators. ACM Trans. Archit. Code Optim. Hiroyuki Usui, Lavanya Subramanian, Kevin Kai-Wei Chang, Onur Mutlu
2016	J	`jnl`	Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism. CoRR Kevin Kai-Wei Chang, Gabriel H. Loh, Mithuna Thottethodi, Yasuko Eckert, Mike O'Connor, Srilatha Manne, Lisa Hsu, Lavanya Subramanian, Onur Mutlu
2016	J	`jnl`	Reducing DRAM Latency by Exploiting Design-Induced Latency Variation in Modern DRAM Chips. CoRR Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Saugata Ghose, Onur Mutlu
2016	J	`jnl`	Social Networking Sites: College Students' Patterns of Use and Concerns for Privacy and Trust by Gender, Ethnicity, and Employment Status. Int. J. Inf. Commun. Technol. Educ. Lydia Kyei-Blankson, Kamakshi S. Iyer, Lavanya Subramanian
2016	J	`jnl`	Tiered-Latency DRAM (TL-DRAM). CoRR Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu
2015	B	`conf`	A-DRM: Architecture-aware Distributed Resource Management of Virtualized Clusters. VEE Hui Wang, Canturk Isci, Lavanya Subramanian, Jongmoo Choi, Depei Qian, Onur Mutlu
2015	B	`conf`	Decoupled Direct Memory Access: Isolating CPU and IO Traffic by Leveraging a Dual-Data-Port DRAM. PACT Donghyuk Lee, Lavanya Subramanian, Rachata Ausavarungnirun, Jongmoo Choi, Onur Mutlu
2015	J	`jnl`	Providing High and Controllable Performance in Multicore Systems Through Shared Resource Management. CoRR Lavanya Subramanian
2015	J	`jnl`	SQUASH: Simple QoS-Aware High-Performance Memory Scheduler for Heterogeneous Systems with Hardware Accelerators. CoRR Hiroyuki Usui, Lavanya Subramanian, Kevin Kai-Wei Chang, Onur Mutlu
2015	J	`jnl`	The Blacklisting Memory Scheduler: Balancing Performance, Fairness and Complexity. CoRR Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, Onur Mutlu
2015	A*	`conf`	The application slowdown model: quantifying and controlling the impact of inter-application interference at shared caches and main memory. MICRO Lavanya Subramanian, Vivek Seshadri, Arnab Ghosh, Samira Manabi Khan, Onur Mutlu
2014	J	`jnl`	Research Problems and Opportunities in Memory Systems. Supercomput. Front. Innov. Onur Mutlu, Lavanya Subramanian
2014	C	`conf`	The Blacklisting Memory Scheduler: Achieving high performance and fairness at low cost. ICCD Lavanya Subramanian, Donghyuk Lee, Vivek Seshadri, Harsha Rastogi, Onur Mutlu
2013	A*	`conf`	MISE: Providing performance predictability and improving fairness in shared main memory systems. HPCA Lavanya Subramanian, Vivek Seshadri, Yoongu Kim, Ben Jaiyen, Onur Mutlu
2013	A*	`conf`	Tiered-latency DRAM: A low latency and low cost DRAM architecture. HPCA Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu
2012	A*	`conf`	Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems. ISCA Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lavanya Subramanian, Gabriel H. Loh, Onur Mutlu
2011	A*	`conf`	Reducing memory interference in multicore systems via application-aware memory channel partitioning. MICRO Sai Prashanth Muralidhara, Lavanya Subramanian, Onur Mutlu, Mahmut T. Kandemir, Thomas Moscibroda