Laurence Pierre

43 papers A 4B 1C 14Misc 1Journal 5Unranked 15
YearRankTypeTitle / Venue / Authors
2021 J jnl
Refinement rules for the automatic TLM-to-RTL conversion of temporal assertions.
Integr.
Laurence Pierre
2019 A conf
Assertion-Based Verification through Binary Instrumentation.
DATE
Enzo Brignon, Laurence Pierre
2018 C conf
Automated Testing for Cyber-physical Systems: From Scenarios to Executable Tests.
FDL
Martial Chabot, Laurence Pierre, Alexandre Nabais-Moreno
2017 C conf
Assertion-Based Verification for SoC Models and Identification of Key Events.
DSD
Laurence Pierre, Martial Chabot
2016 A conf
A requirement driven testing method for multi-disciplinary system design.
MoDELS
Martial Chabot, Laurence Pierre, Alexandre Nabais-Moreno
2016 J jnl
Auxiliary Variables in Temporal Specifications: Semantic and Practical Analysis for System-Level Requirements.
ACM Trans. Design Autom. Electr. Syst.
Laurence Pierre
2015 C conf
Automatic and configurable instrumentation of C programs with temporal assertion checkers.
MEMOCODE
Martial Chabot, Kévin Mazet, Laurence Pierre
2015 C conf
Towards a toolchain for assertion-driven test sequence generation.
FDL
Laurence Pierre
2014 C conf
A Customizable Monitoring Infrastructure for Hardware/Software Embedded Systems.
ICTSS
Martial Chabot, Laurence Pierre
2014 C conf
A tool for the automatic TLM-to-RTL conversion of embedded systems requirements for a seamless verification flow.
VLSI-SoC
Zeineb Bel Hadj Amor, Laurence Pierre, Dominique Borrione
2013 Misc conf
Automatic refinement of requirements for verification throughout the SoC design flow.
CODES+ISSS
Laurence Pierre, Zeineb Bel Hadj Amor
2013 C conf
On the Effectiveness of Assertion-Based Verification in an Industrial Context.
FMICS
Laurence Pierre, Fabrice Pancher, Rodolphe Suescun, Jérôme Quévremont
2012 — conf
A Mixed Verification Strategy Tailored for Networks on Chip.
NOCS
Georgios Tsiligiannis, Laurence Pierre
2012 — conf
A formal framework for testing with assertion checkers in mixed-signal simulation.
ICECS
Laurence Pierre
2012 — conf
Integrating PSL properties into SystemC transactional modeling - Application to the verification of a modem SoC.
SIES
Laurence Pierre, Luca Ferro, Zeineb Bel Hadj Amor, Philippe Bourgon, Jérôme Quévremont
2011 — ch.
Dynamic Verification of SystemC Transactional Models.
Model-Based Testing for Embedded Systems
Laurence Pierre, Luca Ferro
2011 C conf
Improvement of Assertion-Based Verification through the generation of proper test sequences.
FDL
Laurence Pierre, Laila Damri
2011 C conf
Runtime Verification of Typical Requirements for a Space Critical SoC Platform.
FMICS
Luca Ferro, Laurence Pierre, Zeineb Bel Hadj Amor, Jérôme Lachaize, Vincent Lefftz
2011 B conf
Towards Robustness Analysis Using PVS.
ITP
Renaud Clavel, Laurence Pierre, Régis Leveugle
2010 — conf
A Design Flow for Critical Embedded Systems.
SIES
Vincent Lefftz, Jean Bertrand, Hugues Cassé, Christophe Clienti, Philippe Coussy, Laurent Maillet-Contoz, Philippe Mercier, Pierre Moreau, Laurence Pierre, Emmanuel Vaumorin
2010 C conf
Enhancing the assertion-based verification of TLM designs with reentrancy.
MEMOCODE
Laurence Pierre, Luca Ferro
2010 A conf
Formal semantics for PSL modeling layer and application to the verification of transactional models.
DATE
Luca Ferro, Laurence Pierre
2010 C conf
Theorem proving techniques for the formal verification of NoC communications with non-minimal adaptive routing.
DDECS
Amr Helmy, Laurence Pierre, Axel Jantsch
2009 J jnl
A Formal Approach to the Verification of Networks on Chip.
EURASIP J. Embed. Syst.
Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz
2009 — conf
Complementary Formal Approaches for Dependability Analysis.
DFT
Souheib Baarir, Cécile Braunstein, Renaud Clavel, Emmanuelle Encrenaz, Jean-Michel Ilié, Régis Leveugle, Isabelle Mounier, Laurence Pierre, Denis Poitrenaud
2009 C conf
High-level symbolic simulation for automatic model extraction.
DDECS
Florent Ouchet, Dominique Borrione, Katell Morin-Allory, Laurence Pierre
2009 C conf
ISIS: Runtime verification of TLM platforms.
FDL
Luca Ferro, Laurence Pierre
2008 J jnl
A Tractable and Fast Method for Monitoring SystemC TLM Specifications.
IEEE Trans. Computers
Laurence Pierre, Luca Ferro
2008 — conf
Executable formal specification and validation of NoC communication infrastructures.
SBCCI
Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz
2004 — conf
Model-Checking Systems with Unbounded Variables without Abstraction.
AMAST
Magali Contensin, Laurence Pierre
2003 C conf
Combining ACL2 and a v-calculus Model-Checker to Verify System-Level Designs.
MEMOCODE
Magali Contensin, Laurence Pierre
2003 J jnl
Formal Proof of Applications Distributed in Symmetric Interconnection Networks.
Parallel Process. Lett.
Eric Gascard, Laurence Pierre
2002 A conf
Mechanical Verification of Hypercube Algorithms.
IPDPS
Eric Gascard, Laurence Pierre
2001 — conf
Induction-Oriented Formal Verification in Symmetric Interconnection Networks.
CHARME
Eric Gascard, Laurence Pierre
1999 — ed.
Correct Hardware Design and Verification Methods, 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME '99, Bad Herrenalb, Germany, September 27-29, 1999, Proceedings
CHARME
Laurence Pierre, Thomas Kropf
1998 — conf
Formalization of Finite State Machines with Data Path for the Verification of High-Level Synthesis.
SBCCI
Dominique Borrione, Julia Dushina, Laurence Pierre
1996 — conf
Formal Specification of a Reactive System: An Exercise in VHDL, LOTOS and UNITY.
ED&TC
Laurence Pierre
1995 — conf
Describing and verifying synchronous circuits with the Boyer-Moore theorem prover.
CHARME
Laurence Pierre
1994 — conf
An Automatic Generalization Method for the Inductive Proof of Replicated and Parallel Architectures.
TPCD
Laurence Pierre
1994 — conf
Formal Verification of Hardware using LP and Comparison with Nqthm.
Applied Informatics
Michel Allemand, Felix Nicoli, Laurence Pierre
1994 — conf
Formal verification of behavioral VHDL specifications: a case study.
EURO-DAC
Felix Nicoli, Laurence Pierre
1993 — ed.
Correct Hardware Design and Verification Methods, IFIP WG 10.5 Advanced Research Working Conference, CHARME '93, Arles, France, May 24-26, 1993, Proceedings
CHARME
George J. Milne, Laurence Pierre
1993 — conf
VHDL Description and Formal Verification of Systolic Multipliers.
CHDL
Laurence Pierre