Larry T. Pileggi

99 papers A* 9A 9B 2C 2Misc 1Journal 43Unranked 33

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Adaptive Federated Learning via Dynamical System Model. CoRR Aayushya Agarwal, Larry T. Pileggi, Gauri Joshi
2025	J	`jnl`	Homotopy-Guided Self-Supervised Learning of Parametric Solutions for AC Optimal Power Flow. CoRR Shimiao Li, Aaron Tuor, Draguna L. Vrabie, Larry T. Pileggi, Ján Drgona
2024	J	`jnl`	Second-Order Optimization via Quiescence. CoRR Aayushya Agarwal, Larry T. Pileggi, Ronald A. Rohrer
2023	J	`jnl`	An Equivalent Circuit Approach to Distributed Optimization. CoRR Aayushya Agarwal, Larry T. Pileggi
2023	J	`jnl`	An Equivalent Circuit Workflow for Unconstrained Optimization. CoRR Aayushya Agarwal, Carmel Fiscko, Soummya Kar, Larry T. Pileggi, Bruno Sinopoli
2023	J	`jnl`	Contingency Analyses with Warm Starter using Probabilistic Graphical Model. CoRR Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
2023	J	`jnl`	NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report. CoRR Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David M. Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine
2023	—	`conf`	Power Grid Behavioral Patterns and Risks of Generalization in Applied Machine Learning. e-Energy (Companion) Shimiao Li, Ján Drgona, Shrirang Abhyankar, Larry T. Pileggi
2023	J	`jnl`	Power Grid Behavioral Patterns and Risks of Generalization in Applied Machine Learning. CoRR Shimiao Li, Ján Drgona, Shrirang Abhyankar, Larry T. Pileggi
2023	J	`jnl`	Towards Hyperparameter-Agnostic DNN Training via Dynamical System Insights. CoRR Carmel Fiscko, Aayushya Agarwal, Yihan Ruan, Soummya Kar, Larry T. Pileggi, Bruno Sinopoli
2022	—	`conf`	A High Throughput Hardware Accelerator for FFTW Codelets: A First Look. HPEC Larry T. Pileggi, Siyuan Chen, Keshav Harisrikanth, Guanglin Xu, Ken Mai, Franz Franchetti
2022	J	`jnl`	Circuit-theoretic Line Outage Distribution Factor. CoRR Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
2022	J	`jnl`	ECCO: Equivalent Circuit Controlled Optimization. CoRR Aayushya Agarwal, Carmel Fiscko, Soummya Kar, Larry T. Pileggi, Bruno Sinopoli
2022	J	`jnl`	Towards Practical Physics-Informed ML Design and Evaluation for Power Grid. CoRR Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
2021	J	`jnl`	A Convex Method of Generalized State Estimation using Circuit-theoretic Node-breaker Model. CoRR Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
2021	J	`jnl`	A Risk-Managed Steady-State Analysis to Assess The Impact of Power Grid Uncertainties. CoRR Naeem Turner-Bandele, Amritanshu Pandey, Larry T. Pileggi
2021	J	`jnl`	Adversarially Robust Learning for Security-Constrained Optimal Power Flow. CoRR Priya L. Donti, Aayushya Agarwal, Neeraj Vijay Bedmutha, Larry T. Pileggi, J. Zico Kolter
2021	A*	`conf`	Adversarially robust learning for security-constrained optimal power flow. NeurIPS Priya L. Donti, Aayushya Agarwal, Neeraj Vijay Bedmutha, Larry T. Pileggi, J. Zico Kolter
2021	J	`jnl`	Analytical Inverter-Based Distributed Generator Model for Power Flow Analysis. CoRR Naeem Turner-Bandele, Amritanshu Pandey, Larry T. Pileggi
2021	J	`jnl`	Equivalent Circuit Programming for Power Flow Analysis and Optimization. CoRR Marko Jereminov, Larry T. Pileggi
2021	J	`jnl`	Fast AC Steady-State Power Grid Simulation and Optimization Using Prior Knowledge. CoRR Aayushya Agarwal, Amritanshu Pandey, Larry T. Pileggi
2021	A	`conf`	Hardware Redaction via Designer-Directed Fine-Grained eFPGA Insertion. DATE Prashanth Mohan, Oguz Atli, Joseph Sweeney, Onur O. Kibar, Larry T. Pileggi, Ken Mai
2021	—	`conf`	Incremental Model Building Homotopy Approach for Solving Exact AC-Constrained Optimal Power Flow. HICSS Amritanshu Pandey, Aayushya Agarwal, Larry T. Pileggi
2021	J	`jnl`	Split-Chip Design to Prevent IP Reverse Engineering. IEEE Des. Test Samuel Pagliarini, Joseph Sweeney, Ken Mai, R. D. Shawn Blanton, Larry T. Pileggi, Subhasish Mitra
2021	A	`conf`	Top-down Physical Design of Soft Embedded FPGA Fabrics. FPGA Prashanth Mohan, Oguz Atli, Onur O. Kibar, V. Mohammed Zackriya, Larry T. Pileggi, Ken Mai
2021	J	`jnl`	Two-Stage Homotopy Method to Incorporate Discrete Control Variables into AC-OPF. CoRR Timothy McNamara, Amritanshu Pandey, Aayushya Agarwal, Larry T. Pileggi
2020	—	`conf`	A Circuit-Theoretic Approach to State Estimation. ISGT-Europe Shimiao Li, Amritanshu Pandey, Soummya Kar, Larry T. Pileggi
2020	J	`jnl`	A WLAV-based Robust Hybrid State Estimation using Circuit-theoretic Approach. CoRR Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
2020	J	`jnl`	Dynamic Graph-Based Anomaly Detection in the Electrical Grid. CoRR Shimiao Li, Amritanshu Pandey, Bryan Hooi, Christos Faloutsos, Larry T. Pileggi
2020	J	`jnl`	Evaluating Feasibility Within Power Flow. IEEE Trans. Smart Grid Marko Jereminov, David M. Bromberg, Amritanshu Pandey, Martin R. Wagner, Larry T. Pileggi
2020	J	`jnl`	Incremental Model Building Homotopy Approach for Solving Exact AC-Constrained Optimal Power Flow. CoRR Amritanshu Pandey, Aayushya Agarwal, Larry T. Pileggi
2020	J	`jnl`	Steady-State Simulation for Combined Transmission and Distribution Systems. IEEE Trans. Smart Grid Amritanshu Pandey, Larry T. Pileggi
2019	J	`jnl`	A Circuit-Theoretic Approach to State Estimation. CoRR Shimiao Li, Amritanshu Pandey, Soummya Kar, Larry T. Pileggi
2019	J	`jnl`	A LASSO-Inspired Approach for Localizing Power System Infeasibility. CoRR Shimiao Li, Amritanshu Pandey, Aayushya Agarwal, Marko Jereminov, Larry T. Pileggi
2019	—	`conf`	A Linear Formulation for Power System State Estimation including RTU and PMU Measurements. ISGT Europe Aleksandar Jovicic, Marko Jereminov, Larry T. Pileggi, Gabriela Hug
2019	A*	`conf`	Efficient SpMV Operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization. MICRO Fazle Sadi, Joe Sweeney, Tze Meng Low, James C. Hoe, Larry T. Pileggi, Franz Franchetti
2019	—	`conf`	Implicitly Modeling Frequency Control within Power Flow. ISGT Europe Aayushya Agarwal, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi
2019	J	`jnl`	Implicitly Modeling Frequency Control within Power Flow. CoRR Aayushya Agarwal, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi
2019	J	`jnl`	Robust Online Simulation Framework for Grid Restoration Under Loss of SCADA. CoRR Amritanshu Pandey, Aayushya Agarwal, Marko Jereminov, Larry T. Pileggi
2019	—	`conf`	Robust Sequential Steady-State Analysis of Cascading Outages. ISGT Europe Amritanshu Pandey, Aayushya Agarwal, Marko Jereminov, Martin R. Wagner, David M. Bromberg, Larry T. Pileggi
2019	J	`jnl`	Steady-State Simulation for Combined Transmission and Distribution Systems. CoRR Amritanshu Pandey, Larry T. Pileggi
2018	—	`conf`	A 125 MS/s 10.4 ENOB 10.1 fJ/Conv-Step Multi-Comparator SAR ADC with Comparator Noise Scaling in 65nm CMOS. ESSCIRC Shaolong Liu, Jeyanandh Paramesh, Larry T. Pileggi, Taimur Gibran Rabuske, Jorge Fernandcs
2018	A	`conf`	ChangeDAR: Online Localized Change Detection for Sensor Data on a Graph. CIKM Bryan Hooi, Leman Akoglu, Dhivya Eswaran, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi, Christos Faloutsos
2018	—	`conf`	GridWatch: Sensor Placement and Anomaly Detection in the Electrical Grid. ECML/PKDD (1) Bryan Hooi, Dhivya Eswaran, Hyun Ah Song, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi, Christos Faloutsos
2018	—	`conf`	PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV. HPEC Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry T. Pileggi, Franz Franchetti
2018	J	`jnl`	Robust Probabilistic Analysis of Transmission Power Systems based on Equivalent Circuit Formulation. CoRR Martin R. Wagner, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi
2018	J	`jnl`	Robust Steady State Analysis of the Power Grid. CoRR Amritanshu Pandey, Marko Jereminov, Martin R. Wagner, David M. Bromberg, Gabriela Hug, Larry T. Pileggi
2018	A	`conf`	StreamCast: Fast and Online Mining of Power Grid Time Sequences. SDM Bryan Hooi, Hyun Ah Song, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi, Christos Faloutsos
2017	A*	`conf`	A Systems Approach to Computing in Beyond CMOS Fabrics: Invited. DAC Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
2017	J	`jnl`	Aggregated Load and Generation Equivalent Circuit Models with Semi-Empirical Data Fitting. CoRR Amritanshu Pandey, Marko Jereminov, Xin Li, Gabriela Hug, Larry T. Pileggi
2017	—	`conf`	Algorithm and hardware co-optimized solution for large SpMV problems. HPEC Fazle Sadi, Larry T. Pileggi, Franz Franchetti
2017	—	`conf`	Evaluating the benefits of relaxed BEOL pitch for deeply scaled ICs. ISQED Mehmet Meric Isgenc, Samuel Pagliarini, Renzhi Liu, Larry T. Pileggi
2017	J	`jnl`	Improving Power Flow Robustness via Circuit Simulation Methods. CoRR Amritanshu Pandey, Marko Jereminov, Gabriela Hug, Larry T. Pileggi
2017	—	`conf`	Linear load model for robust power system analysis. ISGT Europe Marko Jereminov, Amritanshu Pandey, Hyun Ah Song, Bryan Hooi, Christos Faloutsos, Larry T. Pileggi
2017	—	`conf`	PowerCast: Mining and Forecasting Power Grid Sequences. ECML/PKDD (2) Hyun Ah Song, Bryan Hooi, Marko Jereminov, Amritanshu Pandey, Larry T. Pileggi, Christos Faloutsos
2017	J	`jnl`	Robust Convergence of Power Flow using Tx Stepping Method with Equivalent Circuit Formulation. CoRR Amritanshu Pandey, Marko Jereminov, Martin R. Wagner, Gabriela Hug, Larry T. Pileggi
2016	—	`conf`	3D DRAM based application specific hardware accelerator for SpMV. HPEC Fazle Sadi, Larry T. Pileggi, Franz Franchetti
2016	A*	`conf`	Extended statistical element selection: a calibration method for high resolution in analog/RF designs. DAC Renzhi Liu, Jeffrey A. Weldon, Larry T. Pileggi
2016	—	`conf`	Re-thinking polynomial optimization: Efficient programming of reconfigurable radio frequency (RF) systems by convexification. ASP-DAC Fa Wang, Shihui Yin, Minhee Jun, Xin Li, Tamal Mukherjee, Rohit Negi, Larry T. Pileggi
2016	—	`conf`	Steady-state analysis of power system harmonics using equivalent split-circuit models. ISGT Europe Marko Jereminov, Amritanshu Pandey, David M. Bromberg, Xin Li, Gabriela Hug, Larry T. Pileggi
2016	—	`conf`	Technologies for secure RFID authentication of medicinal pills and capsules. RFID-TA L. Richard Carley, Gurkan Colak, Louis Chomas, Larry T. Pileggi, Kenneth Mai
2016	—	`conf`	Unified power system analyses and models using equivalent circuit formulation. ISGT Amritanshu Pandey, Marko Jereminov, Xin Li, Gabriela Hug, Larry T. Pileggi
2015	A*	`conf`	A synthesis methodology for application-specific logic-in-memory designs. DAC Huseyin Ekin Sumbul, Kaushik Vaidyanathan, Qiuling Zhu, Franz Franchetti, Larry T. Pileggi
2015	A	`conf`	Analog neuromorphic computing enabled by multi-gate programmable resistive devices. DATE Vehbi Calayir, Mohamed Darwish, Jeffrey A. Weldon, Larry T. Pileggi
2015	J	`jnl`	Device Requirements and Technology-Driven Architecture Optimization for Analog Neurocomputing. IEEE J. Emerg. Sel. Topics Circuits Syst. Vehbi Calayir, Larry T. Pileggi
2015	A*	`conf`	Enabling portable energy efficiency with memory accelerated library. MICRO Qi Guo, Tze Meng Low, Nikolaos Alachiotis, Berkin Akin, Larry T. Pileggi, James C. Hoe, Franz Franchetti
2015	J	`jnl`	Energy-Efficient Abundant-Data Computing: The N3XT 1, 000x. Computer Mohamed M. Sabry, Mingyu Gao, Gage Hills, Chi-Shuen Lee, Greg Pitner, Max M. Shulaker, Tony F. Wu, Mehdi Asheghi, Jeffrey Bokor, Franz Franchetti, Kenneth E. Goodson, Christos Kozyrakis, Igor L. Markov, Kunle Olukotun, Larry T. Pileggi, Eric Pop, Jan M. Rabaey, Christopher Ré, H.-S. Philip Wong, Subhasish Mitra
2015	J	`jnl`	Low-Overhead Self-Healing Methodology for Current Matching in Current-Steering DAC. IEEE Trans. Circuits Syst. II Express Briefs Renzhi Liu, Larry T. Pileggi
2014	—	`conf`	A wideband RF receiver with >80 dB harmonic rejection ratio. CICC Renzhi Liu, Larry T. Pileggi, Jeffrey A. Weldon
2014	—	`conf`	Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory. HPEC Fazle Sadi, Berkin Akin, Doru-Thom Popovici, James C. Hoe, Larry T. Pileggi, Franz Franchetti
2014	—	`conf`	Building trusted ICs using split fabrication. HOST Kaushik Vaidyanathan, Bishnu Prasad Das, Huseyin Ekin Sumbul, Renzhi Liu, Larry T. Pileggi
2014	A*	`conf`	Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack. DAC Kaushik Vaidyanathan, Bishnu Prasad Das, Larry T. Pileggi
2014	—	`conf`	Efficient and secure intellectual property (IP) design with split fabrication. HOST Kaushik Vaidyanathan, Renzhi Liu, Huseyin Ekin Sumbul, Qiuling Zhu, Franz Franchetti, Larry T. Pileggi
2014	—	`conf`	Joint invariant estimation of RF impairments for reconfigurable Radio Frequency(RF) front-end. GLOBECOM Workshops Minhee Jun, Rohit Negi, Ying-Chih Wang, Tamal Mukherjee, Xin Li, Jun Tao, Larry T. Pileggi
2014	A	`conf`	Sub-20 nm design technology co-optimization for standard cell logic. ICCAD Kaushik Vaidyanathan, Lars Liebmann, Andrzej J. Strojwas, Larry T. Pileggi
2013	J	`jnl`	A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Jean-Olivier Plouchart, Mark A. Ferriss, Arun Natarajan, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Alexander V. Rylyakov, Benjamin D. Parker, Michael P. Beakes, Aydin Babakhani, Soner Yaldiz, Larry T. Pileggi, Ramesh Harjani, Scott K. Reynolds, José A. Tierno, Daniel J. Friedman
2013	—	`conf`	A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing. 3DIC Qiuling Zhu, Berkin Akin, Huseyin Ekin Sumbul, Fazle Sadi, James C. Hoe, Larry T. Pileggi, Franz Franchetti
2013	—	`conf`	Accelerating sparse matrix-matrix multiplication with 3D-stacked logic-in-memory hardware. HPEC Qiuling Zhu, Tobias Graf, Huseyin Ekin Sumbul, Larry T. Pileggi, Franz Franchetti
2013	—	`conf`	All-magnetic analog associative memory. NEWCAS Vehbi Calayir, Larry T. Pileggi
2013	J	`jnl`	Formal verification of phase-locked loops using reachability analysis and continuization. Commun. ACM Matthias Althoff, Akshay Rajhans, Bruce H. Krogh, Soner Yaldiz, Xin Li, Larry T. Pileggi
2013	B	`conf`	Fully-digital oscillatory associative memories enabled by non-volatile logic. IJCNN Vehbi Calayir, Larry T. Pileggi
2013	J	`jnl`	Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation. J. Signal Process. Syst. Qiuling Zhu, Christian R. Berger, Eric L. Turner, Larry T. Pileggi, Franz Franchetti
2013	B	`conf`	Neurocomputing and associative memories based on ovenized aluminum nitride resonators. IJCNN Vehbi Calayir, Tom Jackson, Augusto Tazzoli, Gianluca Piazza, Larry T. Pileggi
2012	—	`conf`	A Smart Memory Accelerated Computed Tomography Parallel Backprojection. VLSI-SoC (Selected Papers) Qiuling Zhu, Larry T. Pileggi, Franz Franchetti
2012	C	`conf`	Cost-effective smart memory implementation for parallel backprojection in computed tomography. VLSI-SoC Qiuling Zhu, Larry T. Pileggi, Franz Franchetti
2012	—	`conf`	Design Automation Framework for Application-Specific Logic-in-Memory Blocks. ASAP Qiuling Zhu, Kaushik Vaidyanathan, Ofer Shacham, Mark Horowitz, Larry T. Pileggi, Franz Franchetti
2012	Misc	`conf`	Polar format synthetic aperture radar in energy efficient application-specific logic-in-memory. ICASSP Qiuling Zhu, Christian R. Berger, Eric L. Turner, Larry T. Pileggi, Franz Franchetti
2012	A*	`conf`	mLogic: ultra-low voltage non-volatile logic circuits using STT-MTJ devices. DAC Daniel Morris, David M. Bromberg, Jian-Gang Jimmy Zhu, Larry T. Pileggi
2011	A	`conf`	Formal verification of phase-locked loops using reachability analysis and continuization. ICCAD Matthias Althoff, Soner Yaldiz, Akshay Rajhans, Xin Li, Bruce H. Krogh, Larry T. Pileggi
2011	—	`conf`	Post-silicon calibration of analog CMOS using phase-change memory cells. ESSCIRC Cheng-Yuan Wen, Jeyanandh Paramesh, Larry T. Pileggi, Jing Li, Sangbum Kim, Jonathan E. Proesel, Chung Lam
2010	J	`jnl`	Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tejas Jhaveri, Vyacheslav Rovner, Lars Liebmann, Larry T. Pileggi, Andrzej J. Strojwas, Jason Hibbeler
2010	—	`conf`	Statistical modeling and post manufacturing configuration for scaled analog CMOS. CICC Gokce Keskin, Jonathan E. Proesel, Larry T. Pileggi
2009	—	`conf`	Efficient statistical analysis of read timing failures in SRAM circuits. ISQED Soner Yaldiz, Umut Arslan, Xin Li, Larry T. Pileggi
2008	A	`conf`	Automated Testability Enhancements for Logic Brick Libraries. DATE Jason G. Brown, Brian Taylor, Ronald D. Blanton, Larry T. Pileggi
2008	—	`conf`	Mismatch analysis and statistical design at 65 nm and below. CICC Larry T. Pileggi, Gökçe Keskin, Xin Li, Ken Mai, Jonathan E. Proesel
2007	A*	`conf`	Exact Combinatorial Optimization Methods for Physical Design of Regular Logic Bricks. DAC Brian Taylor, Larry T. Pileggi
2007	J	`jnl`	Specification Test Compaction for Analog Circuits and MEMS CoRR Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi
2005	A	`conf`	Specification Test Compaction for Analog Circuits and MEMS. DATE Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi
2004	C	`conf`	Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems. ICCD Radu Marculescu, Diana Marculescu, Larry T. Pileggi