Larry Singer - RankMe

11 papers A 1Journal 5Unranked 5

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A 12b 12GS/s Two-Way Interleaved Pipeline ADC with Integrated Broadband RF VGA in 5nm. ISSCC Haiyang Zhu, Larry Singer, Ron Kapusta, Dan Kelly, Tao Pan, Mike Hensley, Scott Bardsley, Christopher Dillon, Daniel Rey-Losada, Kashif M. Sheikh, Chen-Kai Hsu, Zhao Li, Janet Brunsilius, Enrique Alvarez-Fontecilla, Robert Bishop, Paul Wilkins, Hassan L'Bahy, Adalberto Cantoni, Nuo Zhang, Kaung Myat San Oo, Cihan Asci
2017	—	`conf`	16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology. ISSCC Siddharth Devarajan, Larry Singer, Dan Kelly, Steve Kosic, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow
2017	J	`jnl`	A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology. IEEE J. Solid State Circuits Siddharth Devarajan, Larry Singer, Dan Kelly, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow, Gabriele Manganaro
2009	J	`jnl`	A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC. IEEE J. Solid State Circuits Siddharth Devarajan, Larry Singer, Dan Kelly, Steven Decker, Abhishek Kamath, Paul Wilkins
2009	—	`conf`	A 16b 125MS/s 385mW 78.7dB SNR CMOS pipeline ADC. ISSCC Siddharth Devarajan, Larry Singer, Dan Kelly, Steven Decker, Abhishek Kamath, Paul Wilkins
2009	—	`conf`	A 4-channel 20-to300 Mpixel/s analog front-end with sampled thermal noise below kT/C for digital SLR cameras. ISSCC Ronald Kapusta, Hiroto Shinozaki, Eitake Ibaragi, Kevin Ni, Richard Wang, Mark T. Sayuk, Larry Singer, Katsu Nakamura
2002	J	`jnl`	A 10-300-MHz IF-digitizing IC with 90-105-dB dynamic range and 15-333-kHz bandwidth. IEEE J. Solid State Circuits Richard Schreier, Jennifer Lloyd, Larry Singer, Donald Paterson, Mike Timko, Michael Hensley, Greg Patterson, Kevin Behel, James Zhou
2001	J	`jnl`	A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input. IEEE J. Solid State Circuits Wenhua William Yang, Dan Kelly, Iuri Mehr, Mark T. Sayuk, Larry Singer
2000	J	`jnl`	A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC. IEEE J. Solid State Circuits Iuri Mehr, Larry Singer
1999	—	`conf`	A 55-mW, 10-bit, 10 Msample/s Nyquist rate CMOS ADC. CICC Iuri Mehr, Larry Singer
1996	A	`conf`	12-b 125 MSPS CMOS D/A designed for spectral performance. ISLPED Douglas Mercer, Larry Singer