Lan-Da Van

70 papers A* 1A 3B 2C 12Misc 2Journal 20Unranked 30
YearRankTypeTitle / Venue / Authors
2026 J jnl
Guest Editorial Special Section on the International Symposium on Circuits and Systems - ISCAS 2025.
IEEE Trans. Very Large Scale Integr. Syst.
Xinfei Guo, Lan-Da Van, Aatmesh Shrivastava
2025 — conf
Message from the General Chairs: MCSoC 2025.
MCSoC
Tee Hui Teo, Lan-Da Van
2024 — conf
A Low-Complexity Reconfigurable FFT Processor for Four Data Overlapping Modes.
APCCAS
Lan-Da Van, Yi-Ho Wang, Shen-Jui Huang, Sau-Gee Chen
2023 B conf
A Multilayer Perceptron Model for Station Grouping in IEEE 802.11ah Networks.
NOMS
Guan-Sheng Wang, Chih-Yu Lin, Yu-Chee Tseng, Lan-Da Van
2022 — conf
A Skeleton-based View-Invariant Framework for Human Fall Detection in an Elevator.
ICIT
Rashid Ali, Ivan Surya Hutomo, Lan-Da Van, Yu-Chee Tseng
2022 — conf
Accuracy-Time Efficient Hyperparameter Optimization Using Actor-Critic-based Reinforcement Learning and Early Stopping in OpenAI Gym Environment.
IoTaIS
Albert Budi Christian, Chih-Yu Lin, Yu-Chee Tseng, Lan-Da Van, Wan-Hsun Hu, Chia-Hsuan Yu
2022 J jnl
Online Component Analysis, Architectures and Applications.
Found. Trends Signal Process.
João B. O. Souza Filho, Lan-Da Van, Tzyy-Ping Jung, Paulo S. R. Diniz
2022 — conf
Radar and Camera Fusion for Object Forecasting in Driving Scenarios.
MCSoC
Albert Budi Christian, Yu-Hsuan Wu, Chih-Yu Lin, Lan-Da Van, Yu-Chee Tseng
2021 — conf
A Computation-Aware TPL Utilization Procedure for Parallelizing the FastICA Algorithm on a Multi-Core CPU.
MCSoC
Lan-Da Van, Tao-Jung Wang, Sing-Jia Tzeng, Tzyy-Ping Jung
2021 — conf
An Edge-Controlled Outdoor Autonomous UAV for Colorwise Safety Helmet Detection and Counting of Workers in Construction Sites.
VTC Fall
Susanta Sharma, Allumallu Veera Venkata Susmitha, Lan-Da Van, Yu-Chee Tseng
2021 — conf
Data Fusion Driven Lane-level Precision Data Transmission for V2X Road Applications.
MCSoC
Albert Budi Christian, Chih-Yu Lin, Lan-Da Van, Yu-Chee Tseng
2021 J jnl
Hardware-Oriented Memory-Limited Online Artifact Subspace Reconstruction (HMO-ASR) Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs
Lan-Da Van, You-Cheng Tu, Chi-Yuan Chang, Hsiang-Jen Wang, Tzyy-Ping Jung
2021 J jnl
Things in the air: tagging wearable IoT information on drone videos.
Discov. Internet Things
Lan-Da Van, Lingyan Zhang, Chun-Hao Chang, Kit-Lun Tong, Kun-Ru Wu, Yu-Chee Tseng
2021 — conf
Trajectory-Based Dynamic Handwriting Recognition Using Fusion Neural Network.
TAAI
Tzu-An Huang, Sai-Keung Wong, Lan-Da Van
2020 J jnl
An Intelligent Elevator Development and Management System.
IEEE Syst. J.
Lan-Da Van, Yi-Bing Lin, Tsung-Han Wu, Yu-Chi Lin
2020 J jnl
Green Elevator Scheduling Based on IoT Communications.
IEEE Access
Lan-Da Van, Yi-Bing Lin, Tsung-Han Wu, Tzu-Hsiang Chao
2019 A* conf
Demo: Tagging IoT Data in a Drone View.
MobiCom
Lan-Da Van, Chun-Hao Chang, Kit-Lun Tong, Kun-Ru Wu, Lingyan Zhang, Yu-Chee Tseng
2019 Misc conf
Hardware-oriented Memory-limited Online Fastica Algorithm and Hardware Architecture for Signal Separation.
ICASSP
Lan-Da Van, Tsung-Che Lu, Tzyy-Ping Jung, Jo-Fu Wang
2019 J jnl
PlantTalk: A Smartphone-Based Intelligent Hydroponic Plant Box.
Sensors
Lan-Da Van, Yi-Bing Lin, Tsung-Han Wu, Yun-Wei Lin, Syuan-Ru Peng, Lin-Hang Kao, Chun-Hao Chang
2018 J jnl
Efficient Progressive Radiance Estimation Engine Architecture and Implementation for Progressive Photon Mapping.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ching-Chieh Chiu, Lan-Da Van, Yu-Shu Lin
2018 — conf
FPGA-Oriented Real-Time EMD-Based Breath Signal Processing System on ARM11 MPCore Platform.
DSP
Tsung-Che Lu, Chien-Liang Lin, Pei-Yu Chen, Lan-Da Van
2018 — conf
Type-4 2-D Diagonal and Four-Fold Rotational Symmetry Digital Filter Architectures.
APCCAS
Lan-Da Van, Tsung-Che Lu, Pei-Yu Chen, Hari C. Reddy
2017 C conf
Analyzing students' attention in class using wearable devices.
WoWMoM
Xin Zhang, Cheng-Wei Wu, Philippe Fournier-Viger, Lan-Da Van, Yu-Chee Tseng
2017 — conf
New 2-D filter architectures with quadrantal symmetry and octagonal symmetry and their error analysis.
MWSCAS
Pei-Yu Chen, Lan-Da Van, Hari C. Reddy, I-Hung Khoo
2017 — conf
New 2-D quadrantal- and diagonal-symmetry filter architectures using delta operator.
ASICON
Pei-Yu Chen, Lan-Da Van, I-Hung Khoo, Hari C. Reddy
2017 B conf
Qnalyzer: Queuing Recognition Using Accelerometer and Wi-Fi Signals.
GLOBECOM
Zone-Ze Wu, Cheng-Wei Wu, Lan-Da Van, Yu-Chee Tseng
2017 — conf
Type-3 2-D multimode IIR filter architecture and the corresponding symmetry filter's error analysis.
ASICON
Pei-Yu Chen, Lan-Da Van, Hari C. Reddy, I-Hung Khoo
2016 J jnl
Cost-Effective and Variable-Channel FastICA Hardware Architecture and Implementation for EEG Signal Processing.
J. Signal Process. Syst.
Lan-Da Van, Po-Yen Huang, Tsung-Che Lu
2016 — conf
Intelligent Plant Care Hydroponic Box Using IoTtalk.
iThings/GreenCom/CPSCom/SmartData
Tsung-Han Wu, Chun-Hao Chang, Yun-Wei Lin, Lan-Da Van, Yi-Bing Lin
2014 — conf
Continuous Human Location and Posture Tracking by Multiple Depth Sensors.
iThings/GreenCom/CPSCom
Jun-Wei Qiu, Ting-Hui Chiang, Chi-Chung Lo, Li-Min Lin, Lan-Da Van, Yu-Chee Tseng, Yu-Tai Ching
2014 J jnl
General formulation of shift and delta operator based 2-D VLSI filter structures without global broadcast and incorporation of the symmetry.
Multidimens. Syst. Signal Process.
I-Hung Khoo, Hari C. Reddy, Lan-Da Van, Chin-Teng Lin
2014 — conf
Implementation of a human-centric GUI for next-generation intensive care unit.
ICCE-TW
Tsung-Che Lu, Shang Hwa Hsu, Sing-Jia Tzeng, Che-Ming Chang, Lan-Da Van
2014 — conf
Multiple stopping criteria and high-precision EMD architecture implementation for Hilbert-Huang transform.
BioCAS
Tsung-Che Lu, Pei-Yu Chen, Shih-Wei Yeh, Lan-Da Van
2013 C conf
Area-efficient 2-D digital filter architectures possessing diagonal and four-fold rotational symmetries.
ICICS
Pei-Yu Chen, Lan-Da Van, Hari C. Reddy, I-Hung Khoo
2013 — conf
Design of 2-D digital filters with almost quadrantal symmetric magnitude response without 1-D separable denominator factor constraint.
MWSCAS
I-Hung Khoo, Hari C. Reddy, Lan-Da Van, Chin-Teng Lin
2012 C conf
Delta operator based 2-D VLSI filter structures without global broadcast and incorporation of the quadrantal symmetry.
ISCAS
I-Hung Khoo, Hari C. Reddy, Lan-Da Van, Chin-Teng Lin
2011 — conf
A 0.5V 1KS/s 2.5nW 8.52-ENOB 6.8fJ/conversion-step SAR ADC for biomedical applications.
CICC
Tsung-Che Lu, Lan-Da Van, Chi-Sheng Lin, Chun-Ming Huang
2011 J jnl
A Power-Area Efficient Geometry Engine With Low-Complexity Subdivision Algorithm for 3-D Graphics System.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lan-Da Van, Teng-Yao Sheu
2011 J jnl
Efficient Detection Algorithms for MIMO Communication Systems.
J. Signal Process. Syst.
Di-You Wu, Lan-Da Van
2011 J jnl
Energy-Efficient FastICA Implementation for Biomedical Signal Separation.
IEEE Trans. Neural Networks
Lan-Da Van, Di-You Wu, Chien-Shiun Chen
2011 J jnl
Power-Efficient and Cost-Effective 2-D Symmetry Filter Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pei-Yu Chen, Lan-Da Van, I-Hung Khoo, Hari C. Reddy, Chin-Teng Lin
2009 C conf
2-D Digital Filter Architectures without Global Broadcast and Some Symmetry Applications.
ISCAS
I-Hung Khoo, Hari C. Reddy, Lan-Da Van, Chin-Teng Lin
2009 C conf
A New VLSI 2-D Fourfold-rotational-symmetry Filter Architecture Design.
ISCAS
Pei-Yu Chen, Lan-Da Van, Hari C. Reddy, Chin-Teng Lin
2009 C conf
Low Complexity Subdivision Algorithm to Approximate Phong Shading using Forward Difference.
ISCAS
Teng-Yao Sheu, Lan-Da Van, Tzung-Rung Jung, Cheng-Wei Lin, Ting-Wei Chang
2009 J jnl
Power-Efficient Pipelined Reconfigurable Fixed-Width Baugh-Wooley Multipliers.
IEEE Trans. Computers
Jin-Hao Tu, Lan-Da Van
2008 — conf
A Grouped-Iterative Framework for MIMO Detection.
VTC Fall
Di-You Wu, Lan-Da Van
2008 — conf
A new VLSI 2-D diagonal-symmetry filter architecture design.
APCCAS
Pei-Yu Chen, Lan-Da Van, Hari C. Reddy, Chin-Teng Lin
2008 C conf
Anticipatory access pipeline design for phased cache.
ISCAS
Chih-wen Hsueh, Jen-Feng Chung, Lan-Da Van, Chin-Teng Lin
2008 J jnl
Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor.
IEEE Trans. Very Large Scale Integr. Syst.
Chin-Teng Lin, Yuan-Chu Yu, Lan-Da Van
2008 A conf
Design of multi-mode depth buffer compression for 3D graphics system.
ICME
Tzung-Rung Jung, Lan-Da Van, Teng-Yao Sheu, Cheng-Wei Lin, Wai-Chi Fang
2008 C conf
Front-end amplifier of low-noise and tunable BW/gain for portable biomedical signal acquisition.
ISCAS
Chun-Chieh Huang, Shao-Hang Hung, Jen-Feng Chung, Lan-Da Van, Chin-Teng Lin
2008 — conf
Reconfigurable Depth Buffer Compression Design for 3D Graphics System.
MUE
Tzung-Rung Jung, Lan-Da Van, Wai-Chi Fang, Teng-Yao Sheu
2007 J jnl
Adaptive Low-Error Fixed-Width Booth Multipliers.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Min-An Song, Lan-Da Van, Sy-Yen Kuo
2007 C conf
Classification of Driver's Cognitive Responses Using Nonparametric Single-trial EEG Analysis.
ISCAS
Chin-Teng Lin, Li-Wei Ko, Ken-Li Lin, Sheng-Fu Liang, Bor-Chen Kuo, I-Fang Chung, Lan-Da Van
2007 J jnl
VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Lan-Da Van, Chin-Teng Lin, Yuan-Chu Yu
2006 C conf
A cost-effective reconfigurable accelerator for platform-based SOC design.
ISCAS
Lan-Da Van, Hsin-Fu Luo, Nien-Hsiang Chang, Chun-Ming Huang
2006 C conf
A low-power 64-point FFT/IFFT design for IEEE 802.11a WLAN application.
ISCAS
Chin-Teng Lin, Yuan-Chu Yu, Lan-Da Van
2006 — conf
Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping.
SoCC
Chun-Ming Huang, Kuen-Jong Lee, Chih-Chyau Yang, Wen-Hsiang Hu, Shi-Shen Wang, Jeng-Bin Chen, Chi-Shi Chen, Lan-Da Van, Chien-Ming Wu, Wei-Chang Tsai, Jing-Yang Jou
2005 — conf
A framework for the design of error-aware power-efficient fixed-width Booth multipliers.
ISCAS (1)
Min-An Song, Lan-Da Van, Chih-Chyau Yang, Shih-Chieh Chiu, Sy-Yen Kuo
2005 J jnl
Generalized Low-Error Area-Efficient Fixed-Width Multipliers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lan-Da Van, Chih-Chyau Yang
2005 A conf
High-performance low-complexity bit-plane coding scheme for MPEG-4 FGS.
ICME
Hong-Yu Chao, Jia-Shung Wang, Juin-Long Lin, Kai-Chao Yang, Chien-Ming Wu, Chun-Ming Huang, Lan-Da Van
2004 A conf
A high-performance area-aware DSP processor architecture for video codecs.
ICME
Lan-Da Van, Hsin-Fu Luo, Chien-Ming Wu, Wen-Hsiang Hu, Chun-Ming Huang, Wei-Chang Tsai
2004 — conf
High-speed area-efficient recursive DFT/IDFT architectures.
ISCAS (3)
Lan-Da Van, Chih-Chyau Yang
2002 — conf
A generalized methodology for lower-error area-efficient fixed-width multipliers.
ISCAS (1)
Lan-Da Van, Sung-Huang Lee
2002 J jnl
A new 2-D systolic digital filter architecture without global broadcast.
IEEE Trans. Very Large Scale Integr. Syst.
Lan-Da Van
2002 — conf
Pipelined RLS adaptive architecture using relaxed Givens rotations (RGR).
ISCAS (1)
Lan-Da Van, Chih-Hong Chang
2001 — conf
A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltage.
ISCAS (4)
Chih-Chun Tang, Wen-Shih Lu, Lan-Da Van, Wu-Shiung Feng
2000 C conf
A new VLSI architecture without global broadcast for 2-D digital filters.
ISCAS
Lan-Da Van, Chih-Chun Tang, Shing Tenqchen, Wu-Shiung Feng
1999 Misc conf
A tree-systolic array of DLMS adaptive filter.
ICASSP
Lan-Da Van, Shing Tenqchen, Chia-Hsun Chang, Wu-Shiung Feng
1999 — conf
Design of a lower-error fixed-width multiplier for speech processing application.
ISCAS (3)
Lan-Da Van, Shuenn-Shyang Wang, Shing Tenqchen, Wu-Shiung Feng, Bor-Shenn Jeng