Kyungsu Kang

28 papers A 3C 6Journal 7Unranked 12
YearRankTypeTitle / Venue / Authors
2026 J jnl
LangGS-SLAM: Real-Time Language-Feature Gaussian Splatting SLAM.
CoRR
Seongbo Ha, Sibaek Lee, Kyungsu Kang, Joonyeol Choi, Seungjun Tak, Hyeonwoo Yu
2022 — conf
Accelerating RocksDB for small-zone ZNS SSDs by parallel I/O mechanism.
Middleware Industry
Minwoo Im, Kyungsu Kang, Heonyoung Yeom
2022 — conf
Toward Heterogeneous Virtual Platforms For Early SW Development.
ISOCC
Dongyoung Lee, Kyungsu Kang, Jongseong Park, Byunghoon Lee, Jinbeom Kim, Jae-Woo Im
2021 — conf
Early HW/SW Co-Verification Using Virtual Platforms.
ISOCC
Jungyun Choi, Kyungsu Kang, Byunghoon Lee, Sangho Park, Jae-Woo Im
2020 — conf
On-chip Interconnect Optimization and Validation using Virtual Platform.
ISOCC
Jungyun Choi, Kyungsu Kang, Sangho Park, Seunghan Lee, Yohan Park, Byeongwook Bae, Byunghoon Lee, ByungChul Yoo
2019 A conf
Seamless SoC Verification Using Virtual Platforms: An Industrial Case Study.
DATE
Kyungsu Kang, Sangho Park, Byeongwook Bae, Jungyun Choi, SungGil Lee, Byunghoon Lee, Jong-Bae Lee
2016 A conf
A power-efficient 3-D on-chip interconnect for multi-core accelerators with stacked L2 cache.
DATE
Kyungsu Kang, Sangho Park, Jong-Bae Lee, Luca Benini, Giovanni De Micheli
2016 J jnl
Hybrid L2 NUCA Design and Management Considering Data Access Latency, Energy Efficiency, and Storage Lifetime.
IEEE Trans. Very Large Scale Integr. Syst.
Seunghan Lee, Kyungsu Kang, Jongpil Jung, Chong-Min Kyung
2015 J jnl
Cost-Effective Design of Mesh-of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad Memory.
IEEE Trans. Very Large Scale Integr. Syst.
Kyungsu Kang, Luca Benini, Giovanni De Micheli
2015 J jnl
REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections.
ACM J. Emerg. Technol. Comput. Syst.
Jinho Lee, Kyungsu Kang, Kiyoung Choi
2015 J jnl
Runtime Thermal Management for 3-D Chip-Multiprocessors With Hybrid SRAM/MRAM L2 Cache.
IEEE Trans. Very Large Scale Integr. Syst.
Seunghan Lee, Kyungsu Kang, Chong-Min Kyung
2015 — conf
THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures.
ASP-DAC
Jinho Lee, Junwhan Ahn, Kiyoung Choi, Kyungsu Kang
2014 — conf
Runtime 3-D stacked cache data management for energy minimization of 3-D chip-multiprocessors.
ISQED
Seunghan Lee, Kyungsu Kang, Jongpil Jung, Chong-Min Kyung
2014 — conf
Temperature-aware runtime power management for chip-multiprocessors with 3-D stacked cache.
ISQED
Kyungsu Kang, Giovanni De Micheli, Seunghan Lee, Chong-Min Kyung
2013 — conf
Runtime 3-D stacked cache management for chip-multiprocessors.
ISQED
Jongpil Jung, Kyungsu Kang, Giovanni De Micheli, Chong-Min Kyung
2012 C conf
A high-throughput and low-latency interconnection network for multi-core Clusters with 3-D stacked L2 tightly-coupled data memory.
VLSI-SoC
Kyungsu Kang, Luca Benini, Giovanni De Micheli
2012 C conf
Cost-effective TSV redundancy configuration.
VLSI-SoC
Jongpil Jung, Kyungsu Kang, Jae-Jin Lee, Youngjun Yoon, Chong-Min Kyung
2012 — conf
Temperature-aware energy minimization of 3D-stacked L2 DRAM cache through DVFS.
ISOCC
Woojin Yun, Jongpil Jung, Kyungsu Kang, Chong-Min Kyung
2011 — conf
Design and management of 3D-stacked NUCA cache for chip multiprocessors.
ACM Great Lakes Symposium on VLSI
Jongpil Jung, Kyungsu Kang, Chong-Min Kyung
2011 C conf
Exploiting maximum throughput in 3D multicore architectures with stacked NUCA cache.
VLSI-SoC
Asim Khan, Kyungsu Kang, Chong-Min Kyung
2011 — conf
Maximizing throughput of temperature-constrained multi-core systems with 3D-stacked cache memory.
ISQED
Kyungsu Kang, Jongpil Jung, Sungjoo Yoo, Chong-Min Kyung
2011 J jnl
Runtime Power Management of 3-D Multi-Core Architectures Under Peak Power and Temperature Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kyungsu Kang, Jungsoo Kim, Sungjoo Yoo, Chong-Min Kyung
2011 C conf
Thermal-aware energy minimization of 3D-stacked L3 cache with error rate limitation.
ISCAS
Woojin Yun, Kyungsu Kang, Chong-Min Kyung
2010 C conf
Temperature- and bus traffic- aware data placement in 3D-stacked cache.
VLSI-SoC
Seunghan Lee, Kyungsu Kang, Chong-Min Kyung
2010 J jnl
Temperature-Aware Integrated DVFS and Power Gating for Executing Tasks With Runtime Distribution.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kyungsu Kang, Jungsoo Kim, Sungjoo Yoo, Chong-Min Kyung
2007 C conf
Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model.
VLSI-SoC
Jungsoo Kim, Kyungsu Kang, Heejun Shim, Woong Hwangbo, Chong-Min Kyung
2007 A conf
Search Area Selective Reuse Algorithm in Motion Estimation.
ICME
Heejun Shim, Kyungsu Kang, Chong-Min Kyung
2007 — conf
Software power estimation using IPI(inter-prefetch interval) power model for advanced off-the-shelf processor.
ACM Great Lakes Symposium on VLSI
Kyungsu Kang, Jungsoo Kim, Heejun Shim, Chong-Min Kyung