Kyu-Myung Choi

28 papers A* 1A 10C 1Misc 1Journal 6Unranked 9

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	ML-driven Design Technology Co-Optimization Framework for Advanced Technology Nodes. ASP-DAC Hyunbae Seo, Handong Cho, Sehyeon Chung, Kyu-Myung Choi, Taewhan Kim
2024	A	`conf`	BOXGB: Design Parameter Optimization with Systematic Integration of Bayesian Optimization and XGBoost. DATE Chanhee Jeon, Doyeon Won, Jaewan Yang, Kyu-Myung Choi, Taewhan Kim
2024	A	`conf`	Standard Cell Layout Generator Amenable to Design Technology Co-Optimization in Advanced Process Nodes. DATE Handong Cho, Hyunbae Seo, Sehyeon Chung, Kyu-Myung Choi, Taewhan Kim
2023	A	`conf`	DTOC: integrating Deep-learning driven Timing Optimization into the state-of-the-art Commercial EDA tool. DATE Kyungjoon Chang, Jaehoon Ahn, Heechun Park, Kyu-Myung Choi, Taewhan Kim
2020	J	`jnl`	SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage. Integr. Taehwan Kim, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyu-Myung Choi
2020	—	`conf`	Synthesis of Hardware Performance Monitoring and Prediction Flow Adapting to Near-Threshold Computing and Advanced Process Nodes. ASP-DAC Jeongwoo Heo, Kwangok Jeong, Taewhan Kim, Kyu-Myung Choi
2019	J	`jnl`	Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization. IEEE Trans. Very Large Scale Integr. Syst. Kyeongrok Jo, Seyong Ahn, Jungho Do, Taejoong Song, Taewhan Kim, Kyu-Myung Choi
2019	—	`conf`	SRAM On-Chip Monitoring Methodology for Energy Efficient Memory Operation at Near Threshold Voltage. ISVLSI Taehwan Kim, Kwangok Jeong, Taewhan Kim, Kyu-Myung Choi
2018	—	`conf`	Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion. ASP-DAC Kyeongrok Jo, Seyong Ahn, Taewhan Kim, Kyu-Myung Choi
2015	J	`jnl`	A 14 nm FinFET 128 Mb SRAM With V IEEE J. Solid State Circuits Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang, JaeHo Park, Sunghyun Park, Yongho Kim, Kang-Hyun Baek, Sanghoon Baek, Sang-Kyu Oh, Jinsuk Jung, Sungbong Kim, Gyu-Hong Kim, Jintae Kim, Young-Keun Lee, Sang-Pil Sim, Jong Shik Yoon, Kyu-Myung Choi, Hyo-Sig Won, Jaehong Park
2014	—	`conf`	13.2 A 14nm FinFET 128Mb 6T SRAM with VMIN-enhancement techniques for low-power applications. ISSCC Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang, JaeHo Park, Sunghyun Park, Kang-Hyun Baek, Sanghoon Baek, Sang-Kyu Oh, Jinsuk Jung, Sungbong Kim, Gyu-Hong Kim, Jintae Kim, Young-Keun Lee, Kee Sup Kim, Sang-Pil Sim, Jong Shik Yoon, Kyu-Myung Choi
2010	—	`conf`	An industrial perspective of 3D IC integration technology: from the viewpoint of design technology. ASP-DAC Kyu-Myung Choi
2010	J	`jnl`	Power gating: Circuits, design methodologies, and best practice for standard-cell VLSI designs. ACM Trans. Design Autom. Electr. Syst. Youngsoo Shin, Jun Seomun, Kyu-Myung Choi, Takayasu Sakurai
2010	J	`jnl`	Supply Switching With Ground Collapse for Low-Leakage Register Files in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. Hyung-Ock Kim, Bong Hyun Lee, Jong-Tae Kim, Jung Yun Choi, Kyu-Myung Choi, Youngsoo Shin
2009	C	`conf`	45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme. ISCAS Suk-Soo Pyo, Cheol-Ha Lee, Gyun-Hong Kim, Kyu-Myung Choi, Young-Hyun Jun, Bai-Sun Kong
2008	A*	`conf`	A practical approach of memory access parallelization to exploit multiple off-chip DDR memories. DAC Woo-Cheol Kwon, Sungjoo Yoo, Sung-Min Hong, Byeong Min, Kyu-Myung Choi, Soo-Kwan Eo
2008	A	`conf`	An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication. DATE Woo-Cheol Kwon, Sung-Min Hong, Sungjoo Yoo, Byeong Min, Kyu-Myung Choi, Soo-Kwan Eo
2008	—	`conf`	An industrial perspective of power-aware reliable SoC design. ASP-DAC Soo-Kwan Eo, Sungjoo Yoo, Kyu-Myung Choi
2008	A	`conf`	Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution. DATE Sungpack Hong, Sungjoo Yoo, Byeong Bin, Kyu-Myung Choi, Soo-Kwan Eo, Taehwan Kim
2007	J	`jnl`	Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture CoRR Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2006	A	`conf`	A systematic IP and bus subsystem modeling for platform-based system design. DATE Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim
2006	Misc	`conf`	Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study. CODES+ISSS Sungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, Donghyun Song, Janghwan Kim, Jeongeun Kim, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2006	—	`conf`	PowerV ASP-DAC Ikhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2006	A	`conf`	Runtime distribution-aware dynamic voltage scaling. ICCAD Sungpack Hong, Sungjoo Yoo, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2006	—	`conf`	Worst case execution time analysis for synthesized hardware. ASP-DAC Jun-hee Yoo, Xingguang Feng, Kiyoung Choi, Eui-Young Chung, Kyu-Myung Choi
2005	A	`conf`	Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture. DATE Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2004	A	`conf`	Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design. DATE Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo
2003	A	`conf`	An MTCMOS design methodology and its application to mobile computing. ISLPED Hyo-Sig Won, Kyo-Sun Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, Jeong-Taek Kong