Kyu-Dong Hwang

12 papers C 2Journal 6Unranked 4
YearRankTypeTitle / Venue / Authors
2023 J jnl
A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application.
IEEE J. Solid State Circuits
Dae-Han Kwon, Seongju Lee, Kyuyoung Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dongyoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Guhyun Kim, Byeongju An, Jaewook Lee, Donguc Ko, Younggun Jun, Ilwoong Kim, Choungki Song, Ilkon Kim, Chanwook Park, Seho Kim, Chunseok Jeong, Euicheol Lim, Dongkyun Kim, Jieun Jang, Il Park, Junhyun Chun, Joohwan Cho
2022 — conf
A 1ynm 1.25V 8Gb, 16Gb/s/pin GDDR6-based Accelerator-in-Memory supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep-Learning Applications.
ISSCC
Seong Ju Lee, Kyu-Young Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dong Yoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Jaewook Lee, Donguc Ko, Younggun Jun, Keewon Cho, Ilwoong Kim, Choungki Song, Chunseok Jeong, Dae-Han Kwon, Jieun Jang, Il Park, Junhyun Chun, Joohwan Cho
2022 J jnl
A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer.
IEEE J. Solid State Circuits
Dongsuk Kang, Jae-Woo Park, Injae Park, Minsu Park, Xuefan Jin, Kyu-Dong Hwang, Dae-Han Kwon, Jung-Hoon Chun
2021 — conf
A 21Gb/s Duobinary Transceiver for GDDR interfaces with an Adaptive Equalizer.
A-SSCC
Jae-Woo Park, Dongsuk Kang, Injae Park, Minsu Park, Xuefan Jin, Kyu-Dong Hwang, Dae-Han Kwon, Jung-Hoon Chun
2018 — conf
A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications.
ISSCC
Kyu-Dong Hwang, Boram Kim, Sang-Yeon Byeon, Kyu-Young Kim, Dae-Han Kwon, Hyun-Bae Lee, Geun-Il Lee, Sang-Sic Yoon, Jin-Youp Cha, Soo-young Jang, Seung-Hun Lee, Yongsuk Joo, Gang-Sik Lee, Sung-Soo Xi, Soo-Bin Lim, Kyung-Ho Chu, Joohwan Cho, Junhyun Chun, Jonghoon Oh, Jinkook Kim, Seok Hee Lee
2014 J jnl
A 5 Gbps 1.6 mW/G bps/CH Adaptive Crosstalk Cancellation Scheme With Reference-less Digital Calibration and Switched Termination Resistors for Single-Ended Parallel Interface.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kyu-Dong Hwang, Lee-Sup Kim
2013 J jnl
A 6.5-Gb/s 1-mW/Gb/s/CH Simple Capacitive Crosstalk Compensator in a 130-nm Process.
IEEE Trans. Circuits Syst. II Express Briefs
Kyu-Dong Hwang, Lee-Sup Kim
2012 J jnl
A 5.4/2.7/1.62-Gb/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme.
IEEE Trans. Circuits Syst. I Regul. Pap.
Won-Young Lee, Kyu-Dong Hwang, Lee-Sup Kim
2012 J jnl
A Reconfigurable Heterogeneous Multimedia Processor for IC-Stacking on Si-Interposer.
IEEE Trans. Circuits Syst. Video Technol.
Hyo-Eun Kim, Jae-Sung Yoon, Kyu-Dong Hwang, Young-Jun Kim, Jun-Seok Park, Lee-Sup Kim
2011 — conf
A 275mW heterogeneous multimedia processor for IC-stacking on Si-interposer.
ISSCC
Hyo-Eun Kim, Jae-Sung Yoon, Kyu-Dong Hwang, Young-Jun Kim, Jun-Seok Park, Lee-Sup Kim
2010 C conf
A high resolution metastability-independent two-step gated ring oscillator TDC with enhanced noise shaping.
ISCAS
Sang-Hye Chung, Kyu-Dong Hwang, Won-Young Lee, Lee-Sup Kim
2010 C conf
An area efficient asynchronous gated ring oscillator TDC with minimum GRO stages.
ISCAS
Kyu-Dong Hwang, Lee-Sup Kim