| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2011 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2011 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2011 | C | conf |
ISCAS
|
| 2007 | — | conf |
NANOARCH
|
| 2007 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2006 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2006 | J | jnl |
Microelectron. Reliab.
|
| 2006 | J | jnl |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
|
| 2005 | J | jnl |
Microelectron. Reliab.
|
| 2005 | A | conf |
DATE
|
| 2004 | J | jnl |
Microelectron. Reliab.
|
| 2000 | J | jnl |
IEEE Trans. Computers
|
| 1997 | A* | conf |
Methodology for Behavioral Synthesis-Based Algorithm-Level Design Space Exploration: DCT Case Study.
DAC
|
| 1997 | A | conf |
ICCAD
|
| 1997 | A* | conf |
DAC
|
| 1996 | — | conf |
DFT
|
| 1996 | A | conf |
ICCAD
|