Kwangsoo Han

18 papers A* 3A 5Journal 3Unranked 6
YearRankTypeTitle / Venue / Authors
2024 A conf
2024 ICCAD CAD Contest Problem A: Reinforcement Logic Optimization for a General Cost Function.
ICCAD
Chung-Han Chou, Chih-Jen Hsu, Chi-An Wu, Kuan-Hua Tu, Kwangsoo Han, Zhou Li
2020 J jnl
Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kwangsoo Han, Andrew B. Kahng, Jiajia Li
2018 — conf
A study of optimal cost-skew tradeoff and remaining suboptimality in interconnect tree constructions.
SLIP@DAC
Kwangsoo Han, Andrew B. Kahng, Christopher Moyes, Alex Zelikovsky
2018 — —
IC Physical Design Methodologies for Advanced Process Nodes
Kwangsoo Han
2018 — conf
Prim-Dijkstra Revisited: Achieving Superior Timing-driven Routing Trees.
ISPD
Charles J. Alpert, Wing-Kai Chow, Kwangsoo Han, Andrew B. Kahng, Zhuo Li, Derong Liu, Sriram Venkatesh
2017 J jnl
Benchmarking of Mask Fracturing Heuristics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tuck-Boon Chan, Puneet Gupta, Kwangsoo Han, Abde Ali Kagalwalla, Andrew B. Kahng
2017 J jnl
MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang
2017 A conf
Optimal multi-row detailed placement for yield and model-hardware correlation improvements in sub-10nm VLSI.
ICCAD
Changho Han, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Lutong Wang, Bangqi Xu
2017 — conf
Performance- and energy-aware optimization of BEOL interconnect stack geometry in advanced technology nodes.
ISQED
Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Lutong Wang
2017 A* conf
Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes.
DAC
Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang
2016 — conf
Delay uncertainty and signal criticality driven routing channel optimization for advanced DRAM products.
ASP-DAC
Samyoung Bang, Kwangsoo Han, Andrew B. Kahng, Mulong Luo
2016 A conf
Improved performance of 3DIC implementations through inherent awareness of mix-and-match die stacking.
DATE
Kwangsoo Han, Andrew B. Kahng, Jiajia Li
2015 A* conf
A global-local optimization framework for simultaneous multi-mode multi-corner clock skew variation reduction.
DAC
Kwangsoo Han, Jiajia Li, Andrew B. Kahng, Siddhartha Nath, Jongpil Lee
2015 — conf
Clock clustering and IO optimization for 3D integration.
SLIP
Samyoung Bang, Kwangsoo Han, Andrew B. Kahng, Vaishnav Srinivas
2015 A* conf
Evaluation of BEOL design rule impacts using an optimal ILP-based detailed router.
DAC
Kwangsoo Han, Andrew B. Kahng, Hyein Lee
2015 A conf
Scalable Detailed Placement Legalization for Complex Sub-14nm Constraints.
ICCAD
Kwangsoo Han, Andrew B. Kahng, Hyein Lee
2014 A conf
Benchmarking of mask fracturing heuristics.
ICCAD
Tuck-Boon Chan, Puneet Gupta, Kwangsoo Han, Abde Ali Kagalwalla, Andrew B. Kahng, Emile Sahouria
2014 — conf
OCV-aware top-level clock tree optimization.
ACM Great Lakes Symposium on VLSI
Tuck-Boon Chan, Kwangsoo Han, Andrew B. Kahng, Jae-Gon Lee, Siddhartha Nath