Kunyang Liu - RankMe

26 papers Journal 7Unranked 19

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A Sub-Threshold All-NMOS Reconfigurable PUF with Secure Configuration Selection for Stable 6b/Cell. ISSCC Shufan Xu, Kunyang Liu, Lando Chan, Hironori Tagawa, Hirofumi Shinohara, Kiichi Niitsu
2025	—	`conf`	A 22 nm CMOS .000005 \text{mm}^{2} 0.25 \mathrm{V}$ 2.3pW ISFET Front-End Using Low-Gate-Leakage Thick-Gate-Oxide Transistors for Energy-Efficient Small-Formfactor pH Monitoring. NewCAS Hiroaki Kitaike, Ruilin Zhang, Hironori Tagawa, Kento Okamura, Kei Awano, You Wu, Teruaki Ono, Kohei Sakamoto, Jin Nakamura, Masaya Kaneko, Kunyang Liu, Shufan Xu, Hirofumi Shinohara, Kiichi Niitsu
2025	—	`conf`	A 22 nm CMOS 0.034 mm2 0.4 V 1.3 nW Frequency-Recording IC with 400-Bit Data-Storing Shift Registers Using Burst-Pulse Counting and Reference Pulse Generation for Stand-Alone Continuous Glucose Monitoring Contact Lenses. LASCAS Kei Awano, You Wu, Kento Okamura, Teruaki Ono, Kohei Sakamoto, Hiroaki Kitaike, Hironori Tagawa, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara, Kiichi Niitsu
2025	—	`conf`	A 22nm CMOS 0.017mm ICECS Kento Okamura, Takeshi Fujiyabu, Hisataka Maruyama, Kei Awano, You Wu, Hiroaki Kitaike, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara, Daisuke Anzai, Natsuko Inagaki, Taichi Ito, Kiichi Niitsu
2025	J	`jnl`	A 65-nm CMOS Downconverter-Less Clock Generator Architecture Using Voltage Stacking of Oscillator and Frequency Dividers for Scaling-Friendly IoTs. IEEE Trans. Very Large Scale Integr. Syst. You Wu, Kei Awano, Kento Okamura, Teruaki Ono, Kohei Sakamoto, Hiroaki Kitaike, Hironori Tagawa, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara, Kiichi Niitsu
2025	—	`conf`	ARXPUF: A Modeling Attack Resilient Lightweight Strong PUF based on Add-Rotate-Xor. AsianHOST Zhenzhe Chen, Weirong Dong, Kunyang Liu, Takashi Sato
2025	J	`jnl`	Design and Experimental Verification of 0.9-2.6pW 0.1-0.25V 22nm 2-Bit Supply-to-Digital Converter Using Always-Activated Supply-Controlled Oscillator and Supply-Dependent-Activation Buffers for Bio-Fuel-Cell-Powered-and-Sensed Time-Stamped Bio-Recording. IEEE Trans. Circuits Syst. II Express Briefs Hiroaki Kitaike, Hironori Tagawa, Shufan Xu, Ruilin Zhang, Kunyang Liu, Kiichi Niitsu
2025	—	`conf`	Design of 0.9-2.6pW 0.1-0.25V 22nm 2-bit Supply-to-Digital Converter Using Always-Activated Supply-Controlled Oscillator and Supply-Dependent-Activation Buffers for Bio-Fuel-Cell-Powered-and-Sensed Time-Stamped Bio-Recording. ASP-DAC Hiroaki Kitaike, Hironori Tagawa, Shufan Xu, Ruilin Zhang, Kunyang Liu, Kiichi Niitsu
2024	—	`conf`	A 0.00027 mm NorCAS Hiroaki Kitaike, Hironori Tagawa, Masaya Kaneko, Jin Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hiroki Wakatsuchi, Kyoya Takano, Hirofumi Shinohara, Kiichi Niitsu
2024	J	`jnl`	A 0.116 pJ/bit Latch-Based True Random Number Generator Featuring Static Inverter Selection and Noise Enhancement. IEEE Trans. Very Large Scale Integr. Syst. Xingyu Wang, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara
2024	—	`conf`	A 0.9-2.6pW 0.1-0.25V 22nm 2-bit Supply-to-Digital Converter Using Always-Activated Supply-Controlled Oscillator and Supply-Dependent-Activation Buffers for Bio-Fuel-Cell-Powered-and-Sensed Time-Stamped Bio-Recording. VLSI Technology and Circuits Hiroaki Kitaike, Masaharu Inada, Mitsuru Terauchi, Hironori Tagawa, Ryosuke Nagai, Shufan Xu, Ruilin Zhang, Kunyang Liu, Kiichi Niitsu
2024	—	`conf`	A 2 Hz, 1.2-2 V, 0.22-9 nW, 0.007 mm NorCAS You Wu, Kei Awano, Kento Okamura, Teruaki Ono, Kohei Sakamoto, Hiroaki Kitaike, Hironori Tagawa, Jin Nakamura, Masaya Kaneko, Yuta Kimura, Hiroaki Nakamura, Shufan Xu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara, Kiichi Niitsu
2024	—	`conf`	CLAPPER: Clonable LFSR-based Asymmetric PUF-group with Peer-to-peer Equivalent Response. MWSCAS Zhenzhe Chen, Kunyang Liu, Hirofumi Shinohara, Takashi Sato
2024	J	`jnl`	De-Correlation and De-Bias Post-Processing Circuits for True Random Number Generator. IEEE Trans. Circuits Syst. I Regul. Pap. Ruilin Zhang, Haochen Zhang, Xingyu Wang, Ziyang Ye, Kunyang Liu, Shinichi Nishizawa, Kiichi Niitsu, Hirofumi Shinohara
2023	—	`conf`	A 100-Bit-Output Modeling Attack-Resistant SPN Strong PUF with Uniform and High-Randomness Response. CICC Kunyang Liu, Yichen Tang, Shufan Xu, Ruilin Zhang, Hirofumi Shinohara
2023	—	`conf`	Practical Markov Chain and Von Neumann based Post-processing Circuits for True Random Number Generators. MWSCAS Ruilin Zhang, Haochen Zhang, Xingyu Wang, Ziyang Ye, Kunyang Liu, Hirofumi Shinohara
2022	—	`conf`	A 0.116pJ/bit Latch-Based True Random Number Generator with Static Inverter Selection and Noise Enhancement. VLSI-DAT Xingyu Wang, Ruilin Zhang, Yuxin Wang, Kunyang Liu, Xuanzhen Wang, Hirofumi Shinohara
2022	J	`jnl`	A 0.186-pJ per Bit Latch-Based True Random Number Generator Featuring Mismatch Compensation and Random Noise Enhancement. IEEE J. Solid State Circuits Ruilin Zhang, Xingyu Wang, Kunyang Liu, Hirofumi Shinohara
2022	—	`conf`	A 2.17-pJ/b 5b-Response Attack-Resistant Strong PUF with Enhanced Statistical Performance. ESSCIRC Kunyang Liu, Gen Li, Zihan Fu, Xuanzhen Wang, Hirofumi Shinohara
2021	—	`conf`	36.3 A Modeling Attack Resilient Strong PUF with Feedback-SPN Structure Having <0.73% Bit Error Rate Through In-Cell Hot-Carrier Injection Burn-In. ISSCC Kunyang Liu, Zihan Fu, Gen Li, Hongliang Pu, Zhibo Guan, Xingyu Wang, Xinpeng Chen, Hirofumi Shinohara
2021	—	`conf`	A 0.186-pJ per Bit Latch-Based True Random Number Generator with Mismatch Compensation and Random Noise Enhancement. VLSI Circuits Ruilin Zhang, Xingyu Wang, Luying Wang, Xinpeng Chen, Fan Yang, Kunyang Liu, Hirofumi Shinohara
2021	J	`jnl`	A 0.5-V Hybrid SRAM Physically Unclonable Function Using Hot Carrier Injection Burn-In for Stability Reinforcement. IEEE J. Solid State Circuits Kunyang Liu, Xinpeng Chen, Hongliang Pu, Hirofumi Shinohara
2020	—	`conf`	A 0.5-V 2.07-fJ/b 497-F CICC Kunyang Liu, Hongliang Pu, Hirofumi Shinohara
2020	J	`jnl`	A 373-F IEEE J. Solid State Circuits Kunyang Liu, Yue Min, Xuan Yang, Hanfeng Sun, Hirofumi Shinohara
2020	—	`conf`	An Inverter-Based True Random Number Generator with 4-bit Von-Neumann Post-Processing Circuit. MWSCAS Xingyu Wang, HongJie Liu, Ruilin Zhang, Kunyang Liu, Hirofumi Shinohara
2018	—	`conf`	A 373 F A-SSCC Kunyang Liu, Yue Min, Xuan Yang, Hanfeng Sun, Hirofumi Shinohara