Kunal Banerjee

60 papers A 3B 3C 5Journal 20Unranked 29
YearRankTypeTitle / Venue / Authors
2024 — conf
BARGAIN: A Super-Resolution Technique to Gain High-Resolution Images for Barcodes.
COMAD/CODS
Saptarshi Misra, Kunal Banerjee, Anirban Chatterjee
2024 — conf
Real-time Anomaly Prediction at Scale using Anomaly Detection Augmented with Regression.
COMAD/CODS (December)
Kunal Banerjee, Binay Gupta, Meet Maheshwari, Lalitdutt Parsai, Geet Vudata, Soumik Dasgupta, Anirban Chatterjee
2024 — conf
waLLMartCache: A Distributed, Multi-tenant and Enhanced Semantic Caching System for LLMs.
ICPR (7)
Soumik Dasgupta, Anurag Wagh, Lalitdutt Parsai, Binay Gupta, Geet Vudata, Shally Sangal, Sohom Majumdar, Hema Rajesh, Kunal Banerjee, Anirban Chatterjee
2023 — conf
A Dynamic Attention Based Graph Neural Network for Anomaly Prediction in Multi-Variate Time-Series & Its Application in Network Monitoring.
COMAD/CODS
Meet Maheshwari, Binay Gupta, Anirban Chatterjee, Kunal Banerjee
2023 — conf
Are you a Foodie looking for New Cookies to try out? Better not ask an LLM.
AIMLSystems
Binay Gupta, Saptarshi Misra, Anirban Chatterjee, Kunal Banerjee
2023 — conf
Designing a Vision Transformer based Enhanced Text Extractor for Product Images.
COMAD/CODS
Saptarshi Misra, Pranay Dugar, Anirban Chatterjee, Lalitdutt Parsai, Kunal Banerjee
2023 — conf
These Deals Won't Last! Longevity, Uniformity, and Bias in Product Badge Assignment in eCommerce Platforms.
eCom@SIGIR
Archit Bansal, Kunal Banerjee, Abhijnan Chakraborty
2022 — conf
Designing, Developing and Deploying an Enterprise Scale Network Monitoring System.
ISEC
Arkadip Basu, Rishi Singh, Chenyang Yu, Amarjeet Prasad, Kunal Banerjee
2022 J jnl
Detecting Concept Drift in the Presence of Sparsity - A Case Study of Automated Change Risk Assessment System.
CoRR
Vishwas Choudhary, Binay Gupta, Anirban Chatterjee, Subhadip Paul, Kunal Banerjee, Vijay Agneeswaran
2022 — conf
Developing a noise-aware AI system for change risk assessment with minimal human intervention.
CIKM Workshops
Subhadip Paul, Anirban Chatterjee, Binay Gupta, Kunal Banerjee
2022 — conf
Don't Miss the Fine Print! An Enhanced Framework to Extract Text from Low Resolution Images.
VISIGRAPP (5: VISAPP)
Pranay Dugar, Aditya Vikram, Anirban Chatterjee, Kunal Banerjee, Vijay Agneeswaran
2022 — conf
Look before You Leap! Designing a Human-centered AI System for Change Risk Assessment.
ICAART (3)
Binay Gupta, Anirban Chatterjee, Subhadip Paul, Harika Matha, Lalitdutt Parsai, Kunal Banerjee, Vijay Agneeswaran
2022 J jnl
These Deals Won't Last! Longevity, Uniformity and Bias in Product Badge Assignment in E-Commerce Platforms.
CoRR
Archit Bansal, Kunal Banerjee, Abhijnan Chakraborty
2022 B conf
WALTS: Walmart AutoML Libraries, Tools and Services.
SEAA
Rahul Bajaj, Kunal Banerjee, Lalitdutt Parsai, Deepansh Goyal, Sachin Parmar, Divyajyothi Bn, Balamurugan Subramaniam, Chaitanya Sai, Tarun Balotia, Anirban Chatterjee, Kailash Sati
2021 — conf
Designing a Bot for Efficient Distribution of Service Requests.
BotSE@ICSE
Arkadip Basu, Kunal Banerjee
2021 J jnl
Designing a Bot for Efficient Distribution of Service Requests.
CoRR
Arkadip Basu, Kunal Banerjee
2021 — conf
Exploring Alternatives to Softmax Function.
DeLTA
Kunal Banerjee, Vishak Prasad C., Rishi Raj Gupta, Kartik Vyas, Anushree H., Biswajit Mishra
2021 A conf
From Pixels to Words: A Scalable Journey of Text Information from Product Images to Retail Catalog.
CIKM
Pranay Dugar, Rajesh Shreedhar Bhat, Asit Sharad Tarsode, Uddipto Dutta, Kunal Banerjee, Anirban Chatterjee, Vijay Srinivas Agneeswaran
2021 J jnl
Look Before You Leap! Designing a Human-Centered AI System for Change Risk Assessment.
CoRR
Binay Gupta, Anirban Chatterjee, Harika Matha, Kunal Banerjee, Lalitdutt Parsai, Vijay Agneeswaran
2020 J jnl
Exploring Alternatives to Softmax Function.
CoRR
Kunal Banerjee, Vishak Prasad C., Rishi Raj Gupta, Karthik Vyas, Anushree H., Biswajit Mishra
2020 A conf
Harnessing Deep Learning via a Single Building Block.
IPDPS
Evangelos Georganas, Kunal Banerjee, Dhiraj D. Kalamkar, Sasikanth Avancha, Anand Venkat, Michael J. Anderson, Greg Henry, Hans Pabst, Alexander Heinecke
2020 — conf
Reliability Evaluation of Compressed Deep Learning Models.
LASCAS
Brunno F. Goldstein, Sudarshan Srinivasan, Dipankar Das, Kunal Banerjee, Leandro Santiago de Araújo, Victor da Cruz Ferreira, Alexandre Solon Nery, Sandip Kundu, Felipe M. G. França
2019 J jnl
A Quick Introduction to Functional Verification of Array-Intensive Programs.
CoRR
Kunal Banerjee, Chandan Karfa
2019 J jnl
A Study of BFLOAT16 for Deep Learning Training.
CoRR
Dhiraj D. Kalamkar, Dheevatsa Mudigere, Naveen Mellempudi, Dipankar Das, Kunal Banerjee, Sasikanth Avancha, Dharma Teja Vooturi, Nataraj Jammalamadaka, Jianyu Huang, Hector Yuen, Jiyan Yang, Jongsoo Park, Alexander Heinecke, Evangelos Georganas, Sudarshan Srinivasan, Abhisek Kundu, Misha Smelyanskiy, Bharat Kaul, Pradeep Dubey
2019 J jnl
Counter-example generation procedure for path-based equivalence checkers.
IET Softw.
Ramanuj Chouksey, Chandan Karfa, Kunal Banerjee, Pankaj Kumar Kalita, Purandar Bhaduri
2019 J jnl
High-Performance Deep Learning via a Single Building Block.
CoRR
Evangelos Georganas, Kunal Banerjee, Dhiraj D. Kalamkar, Sasikanth Avancha, Anand Venkat, Michael J. Anderson, Greg Henry, Hans Pabst, Alexander Heinecke
2019 J jnl
K-TanH: Hardware Efficient Activations For Deep Learning.
CoRR
Abhisek Kundu, Sudarshan Srinivasan, Eric C. Qin, Dhiraj D. Kalamkar, Naveen K. Mellempudi, Dipankar Das, Kunal Banerjee, Bharat Kaul, Pradeep Dubey
2019 J jnl
Optimizing Deep Learning RNN Topologies on Intel Architecture.
Supercomput. Front. Innov.
Kunal Banerjee, Evangelos Georganas, Dhiraj D. Kalamkar, Barukh Ziv, Eden Segal, Cristina Anderson, Alexander Heinecke
2019 C conf
Training Google Neural Machine Translation on an Intel CPU Cluster.
CLUSTER
Dhiraj D. Kalamkar, Kunal Banerjee, Sudarshan Srinivasan, Srinivas Sridharan, Evangelos Georganas, Mikhail E. Smorkalov, Cong Xu, Alexander Heinecke
2018 J jnl
Anatomy Of High-Performance Deep Learning Convolutions On SIMD Architectures.
CoRR
Evangelos Georganas, Sasikanth Avancha, Kunal Banerjee, Dhiraj D. Kalamkar, Greg Henry, Hans Pabst, Alexander Heinecke
2018 A conf
Anatomy of high-performance deep learning convolutions on SIMD architectures.
SC
Evangelos Georganas, Sasikanth Avancha, Kunal Banerjee, Dhiraj D. Kalamkar, Greg Henry, Hans Pabst, Alexander Heinecke
2018 — conf
Automatic detection of inverse operations while avoiding loop unrolling.
ICSE (Companion Volume)
Kunal Banerjee, Ramanuj Chouksey, Chandan Karfa, Pankaj Kumar Kalita
2018 — conf
Compiler-agnostic Translation Validation.
ISEC
Kunal Banerjee, Chandan Karfa
2018 — conf
Mixed Precision Training of Convolutional Neural Networks using Integer Operations.
ICLR (Poster)
Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov
2018 J jnl
Mixed Precision Training of Convolutional Neural Networks using Integer Operations.
CoRR
Dipankar Das, Naveen Mellempudi, Dheevatsa Mudigere, Dhiraj D. Kalamkar, Sasikanth Avancha, Kunal Banerjee, Srinivas Sridharan, Karthik Vaidyanathan, Bharat Kaul, Evangelos Georganas, Alexander Heinecke, Pradeep Dubey, Jesús Corbal, Nikita Shustrov, Roman Dubtsov, Evarist Fomenko, Vadim O. Pirogov
2017 C conf
An End-to-end Formal Verifier for Parallel Programs.
ICSOFT
Soumyadip Bandyopadhyay, Santonu Sarkar, Kunal Banerjee
2017 B conf
An Equivalence Checking Framework for Array-Intensive Programs.
ATVA
Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar
2017 J jnl
Deriving Bisimulation Relations from Path Extension Based Equivalence Checkers.
IEEE Trans. Software Eng.
Kunal Banerjee, Dipankar Sarkar, Chittaranjan Mandal
2017 J jnl
Deriving bisimulation relations from path based equivalence checkers.
Formal Aspects Comput.
Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal
2017 — conf
PRESGen: A Fully Automatic Equivalence Checker for Validating Optimizing and Parallelizing Transformations.
SEM4HPC@HPDC
Soumyadip Bandyopadhyay, Kunal Banerjee
2017 J jnl
Ternary Residual Networks.
CoRR
Abhisek Kundu, Kunal Banerjee, Naveen Mellempudi, Dheevatsa Mudigere, Dipankar Das, Bharat Kaul, Pradeep Dubey
2016 J jnl
A Path Construction Algorithm for Translation Validation Using PRES+ Models.
Parallel Process. Lett.
Soumyadip Bandyopadhyay, Dipankar Sarkar, Chittaranjan A. Mandal, Kunal Banerjee, Krishnam Raju Duddu
2016 — conf
Data-race detection: the missing piece for an end-to-end semantic equivalence checker for parallelizing transformations of array-intensive programs.
ARRAY@PLDI
Kunal Banerjee, Soumyadip Banerjee, Santonu Sarkar
2016 — conf
Implementing an Efficient Path Based Equivalence Checker for Parallel Programs.
SEM4HPC@HPDC
Soumyadip Bandyopadhyay, Kunal Banerjee
2016 B conf
Translation validation of loop and arithmetic transformations in the presence of recurrences.
LCTES
Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar
2015 — conf
A Path-based Equivalence Checking Method for Petri Net based Models of Programs.
ICSOFT-EA
Soumyadip Bandyopadhyay, Dipankar Sarkar, Kunal Banerjee, Chittaranjan A. Mandal
2015 C conf
A translation validation framework for symbolic value propagation based equivalence checking of FSMDAs.
SCAM
Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar
2015 — conf
Determining Equivalence of Expressions: An Automated Evaluator's Perspective.
T4E
K. K. Sharma, Kunal Banerjee, Chittaranjan A. Mandal
2015 — conf
Establishing Equivalence of Expressions: An Automated Evaluator Designer's Perspective.
MIKE
K. K. Sharma, Kunal Banerjee, Chittaranjan A. Mandal
2015 — conf
Translation Validation of Transformations of Embedded System Specifications Using Equivalence Checking.
ISVLSI
Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar
2014 — conf
A BDD based secure hardware design method to guard against power analysis attacks.
VDAT
Partha De, Kunal Banerjee, Chittaranjan A. Mandal
2014 C conf
Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks.
DSD
Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay
2014 J jnl
Extending the FSMD Framework for Validating Code Motions of Array-Handling Programs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal
2014 — conf
Extending the scope of translation validation by augmenting path based equivalence checkers with SMT solvers.
VDAT
Kunal Banerjee, Chittaranjan A. Mandal, Dipankar Sarkar
2014 J jnl
Verification of Code Motion Techniques Using Value Propagation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kunal Banerjee, Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Mandal
2013 C conf
Designing DPA Resistant Circuits Using BDD Architecture and Bottom Pre-charge Logic.
DSD
Partha De, Kunal Banerjee, Chittaranjan A. Mandal, Debdeep Mukhopadhyay
2013 J jnl
Verification of Loop and Arithmetic Transformations of Array-Intensive Behaviors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chandan Karfa, Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal
2012 — conf
A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques.
ISED
Kunal Banerjee, Chandan Karfa, Dipankar Sarkar, Chittaranjan Mandal
2012 — conf
Translation Validation for PRES+ Models of Parallel Behaviours via an FSMD Equivalence Checker.
VDAT
Soumyadip Bandyopadhyay, Kunal Banerjee, Dipankar Sarkar, Chittaranjan A. Mandal
2011 — conf
Equivalence Checking of Array-Intensive Programs.
ISVLSI
Chandan Karfa, Kunal Banerjee, Dipankar Sarkar, Chitta Mandal