Kun Yuan

21 papers A* 4A 4Journal 10Unranked 3
YearRankTypeTitle / Venue / Authors
2016 J jnl
EBL Overlapping Aware Stencil Planning for MCC System.
ACM Trans. Design Autom. Electr. Syst.
Bei Yu, Kun Yuan, Jhih-Rong Gao, Shiyan Hu, David Z. Pan
2015 J jnl
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System.
CoRR
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
2015 J jnl
Layout Decomposition for Triple Patterning Lithography.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bei Yu, Kun Yuan, Duo Ding, David Z. Pan
2014 J jnl
E-BLOW: E-Beam Lithography Overlapping aware Stencil Planning for MCC System.
CoRR
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
2014 J jnl
Layout decomposition for triple patterning lithography.
CoRR
Bei Yu, Kun Yuan, Boyang Zhang, Duo Ding, David Z. Pan
2013 A* conf
E-BLOW: e-beam lithography overlapping aware stencil planning for MCC system.
DAC
Bei Yu, Kun Yuan, Jhih-Rong Gao, David Z. Pan
2012 A conf
Dealing with IC manufacturability in extreme scaling (Embedded tutorial paper).
ICCAD
Bei Yu, Jhih-Rong Gao, Duo Ding, Yongchan Ban, Jae-Seok Yang, Kun Yuan, Minsik Cho, David Z. Pan
2012 J jnl
E-Beam Lithography Stencil Planning and Optimization With Overlapped Characters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kun Yuan, Bei Yu, David Z. Pan
2011 A* conf
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection.
DAC
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan
2011 — conf
E-beam lithography stencil planning and optimization with overlapped characters.
ISPD
Kun Yuan, David Z. Pan
2011 A conf
Layout decomposition for triple patterning lithography.
ICCAD
Bei Yu, Kun Yuan, Boyang Zhang, Duo Ding, David Z. Pan
2010 — conf
A new graph-theoretic, multi-objective layout decomposition framework for double patterning lithography.
ASP-DAC
Jae-Seok Yang, Katrina Lu, Minsik Cho, Kun Yuan, David Z. Pan
2010 J jnl
Double Patterning Layout Decomposition for Simultaneous Conflict and Stitch Minimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kun Yuan, Jae-Seok Yang, David Z. Pan
2010 J jnl
Manufacturability Aware Routing in Nanometer VLSI.
Found. Trends Electron. Des. Autom.
David Z. Pan, Minsik Cho, Kun Yuan
2010 A conf
WISDOM: Wire spreading enhanced decomposition of masks in Double Patterning Lithography.
ICCAD
Kun Yuan, David Z. Pan
2009 J jnl
BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability.
ACM Trans. Design Autom. Electr. Syst.
Minsik Cho, Katrina Lu, Kun Yuan, David Z. Pan
2009 — conf
Double patterning layout decomposition for simultaneous conflict and stitch minimization.
ISPD
Kun Yuan, Jae-Seok Yang, David Z. Pan
2009 A* conf
Double patterning lithography friendly detailed routing with redundant via consideration.
DAC
Kun Yuan, Katrina Lu, David Z. Pan
2009 J jnl
ELIAD: Efficient Lithography Aware Detailed Routing Algorithm With Compact and Macro Post-OPC Printability Prediction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan
2008 A* conf
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction.
DAC
Minsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan
2007 A conf
BoxRouter 2.0: architecture and implementation of a hybrid and robust global router.
ICCAD
Minsik Cho, Katrina Lu, Kun Yuan, David Z. Pan