Krzysztof Kuchcinski

91 papers A* 1A 8B 1C 13Misc 4Journal 21Unranked 43

Year	Rank	Type	Title / Venue / Authors
2019	J	`jnl`	Constraint programming in embedded systems design: Considered helpful. Microprocess. Microsystems Krzysztof Kuchcinski
2016	—	`conf`	Code generation for a SIMD architecture with custom memory organisation. DASIP Mehmet Ali Arslan, Flavius Gruian, Krzysztof Kuchcinski, Andreas Karlsson
2015	J	`jnl`	A Comparative Study of Scheduling Techniques for Multimedia Applications on SIMD Pipelines. CoRR Mehmet Ali Arslan, Flavius Gruian, Krzysztof Kuchcinski
2015	—	`conf`	Application-set driven exploration for custom processor architectures. ASAP Mehmet Ali Arslan, Flavius Gruian, Krzysztof Kuchcinski
2015	—	`conf`	Programming support for reconfigurable custom vector architectures. PMAM@PPoPP Mehmet Ali Arslan, Krzysztof Kuchcinski, Flavius Gruian, Yangxurui Liu
2014	J	`jnl`	Instruction selection and scheduling for DSP kernels. Microprocess. Microsystems Mehmet Ali Arslan, Krzysztof Kuchcinski
2014	—	`conf`	Lessons from ten years of the international master's program in System-on-Chip. EWME Peter Nilsson, Pietro Andreani, Krzysztof Kuchcinski, Joachim Rodrigues, Henrik Sjöland, Markus Törmänen, Lars-Erik Wernersson, Viktor Öwall
2014	J	`jnl`	Mapping streaming applications on multiprocessors with time-division-multiplexed network-on-chip. Comput. Electr. Eng. Usman Mazhar Mirza, Flavius Gruian, Krzysztof Kuchcinski
2013	—	`conf`	Design space exploration for streaming applications on multiprocessors with guaranteed service NoC. NoCArc@MICRO Usman Mazhar Mirza, Flavius Gruian, Krzysztof Kuchcinski
2013	C	`conf`	Instruction Selection and Scheduling for DSP Kernels on Custom Architectures. DSD Mehmet Ali Arslan, Krzysztof Kuchcinski
2012	J	`jnl`	Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation. ACM Trans. Reconfigurable Technol. Syst. Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
2012	—	`conf`	Partitioning and mapping dynamic dataflow programs. ACSCC Mehmet Ali Arslan, Jörn W. Janneck, Krzysztof Kuchcinski
2012	J	`jnl`	Scheduling, Binding and Routing System for a Run-Time Reconfigurable Operator Based Multimedia Architecture. Int. J. Embed. Real Time Commun. Syst. Erwan Raffin, Christophe Wolinski, François Charot, Emmanuel Casseau, Antoine Floch, Krzysztof Kuchcinski, Stéphane Chevobbe, Stéphane Guyetant
2011	—	`conf`	Distributed Constraint Programming with Agents. ICAIS Carl Christian Rolf, Krzysztof Kuchcinski
2011	—	`conf`	Exploring Software Product Management decision problems with constraint solving - opportunities for prioritization and release planning. IWSPM Björn Regnell, Krzysztof Kuchcinski
2010	—	`conf`	Combined scheduling and instruction selection for processors with reconfigurable cell fabric. ASAP Antoine Floch, Christophe Wolinski, Krzysztof Kuchcinski
2010	—	`conf`	Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture. DASIP Erwan Raffin, Christophe Wolinski, François Charot, Krzysztof Kuchcinski, Stéphane Guyetant, Stéphane Chevobbe, Emmanuel Casseau
2009	C	`conf`	Architecture-Driven Synthesis of Reconfigurable Cells. DSD Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin, François Charot
2009	J	`jnl`	Automatic design of application-specific reconfigurable processor extensions with UPaK synthesis kernel. ACM Trans. Design Autom. Electr. Syst. Christophe Wolinski, Krzysztof Kuchcinski, Erwan Raffin
2009	—	`conf`	Constraint-Driven Identification of Application Specific Instructions in the SAMOS Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
2009	—	`conf`	Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system. ASAP Kevin J. M. Martin, Christophe Wolinski, Krzysztof Kuchcinski, Antoine Floch, François Charot
2009	—	`conf`	Design space exploration for optimal memory mapping of data and instructions in multimedia applications to Scratch-Pad Memories. ESTIMedia Ali R. Iranpour, Krzysztof Kuchcinski
2009	—	`conf`	How Constrains Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. ERSA Christophe Wolinski, Krzysztof Kuchcinski, Kevin J. M. Martin, Erwan Raffin, François Charot
2009	Misc	`conf`	Parallel Consistency in Constraint Programming. PDPTA Carl Christian Rolf, Krzysztof Kuchcinski
2008	B	`conf`	Area and reconfiguration time minimization of the communication network in regular 2D reconfigurable architectures. FPL Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig
2008	A	`conf`	Automatic Selection of Application-Specific Reconfigurable Processor Extensions. DATE Christophe Wolinski, Krzysztof Kuchcinski
2008	C	`conf`	Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures. DSD Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig
2008	C	`conf`	Load-balancing methods for parallel and distributed constraint solving. CLUSTER Carl Christian Rolf, Krzysztof Kuchcinski
2008	Misc	`conf`	Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures. FCCM Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig
2008	C	`conf`	State-copying and Recomputation in Parallel Constraint Programming with Global Constraints. PDP Carl Christian Rolf, Krzysztof Kuchcinski
2007	Misc	`conf`	A CP-LP approach to network management in OSPF routing. SAC Mats Petter Pettersson, Radoslaw Szymanek, Krzysztof Kuchcinski
2007	—	`conf`	A New Necessary Condition for Shortest Path Routing. NET-COOP Mats Petter Pettersson, Krzysztof Kuchcinski
2007	—	`conf`	Computation Patterns Identification for Instruction Set Extensions Implemented as Reconfigurable Hardware. ERSA Christophe Wolinski, Krzysztof Kuchcinski
2007	C	`conf`	Graph Matching Constraints for Synthesis with Complex Components. DSD Ana Fuentes Martinez, Krzysztof Kuchcinski
2007	—	`conf`	Identification of Application Specific Instructions Based on Sub-Graph Isomorphism Constraints. ASAP Christophe Wolinski, Krzysztof Kuchcinski
2006	—	`conf`	Memory Architecture Evaluation for Video Encoding on Enhanced Embedded Processors. SAMOS Ali R. Iranpour, Krzysztof Kuchcinski
2006	C	`conf`	Performance Improvement for H.264 Video Encoding using ILP Embedded Processor. DSD Ali R. Iranpour, Krzysztof Kuchcinski
2005	C	`conf`	A Constraints Programming Approach for Fabric Cell Synthesis. DSD Christophe Wolinski, Krzysztof Kuchcinski
2005	Misc	`conf`	Automatic generation of application-specific systems based on a micro-programmed Java core. SAC Flavius Gruian, Per Andersson, Krzysztof Kuchcinski, Martin Schoeberl
2005	—	`conf`	Implementation aspects of a novel speech packet loss concealment method. ISCAS (3) Henrik Svensson, Viktor Öwall, Krzysztof Kuchcinski
2005	C	`conf`	Java to Hardware Compilation for non Data Flow Applications. DSD Per Andersson, Krzysztof Kuchcinski
2004	C	`conf`	A Constraints Programming Approach to Communication Scheduling on SoPC Architectures. DSD Christophe Wolinski, Krzysztof Kuchcinski, Maya B. Gokhale
2004	A	`conf`	A constraints programming approach to communication scheduling on SoPC architectures. FPGA Christophe Wolinski, Krzysztof Kuchcinski, Maya B. Gokhale
2004	—	`conf`	Data assignment and access scheduling exploration for multi-layer memory architectures. ESTIMedia Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski
2004	—	`conf`	Distinguished Paper: Automatic Local Memory Architecture Generation for Data Reuse in Custom Data Paths. ERSA Per Andersson, Krzysztof Kuchcinski
2004	C	`conf`	Evaluation of SIMD Architecture Enhancement in Embedded Processors for MPEG-4. DSD Ali R. Iranpour, Krzysztof Kuchcinski
2004	A	`conf`	Time-Energy Design Space Exploration for Multi-Layer Memory Architectures. DATE Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuchcinski
2003	J	`jnl`	Constraints-driven scheduling and resource assignment. ACM Trans. Design Autom. Electr. Syst. Krzysztof Kuchcinski
2003	J	`jnl`	Global approach to assignment and scheduling of complex behaviors based on HCDG and constraint programming. J. Syst. Archit. Krzysztof Kuchcinski, Christophe Wolinski
2003	A*	`conf`	Partial task assignment of task graphs under heterogeneous resource constraints. DAC Radoslaw Szymanek, Krzysztof Kuchcinski
2003	A	`conf`	Uncertainty-based scheduling: energy-efficient ordering for tasks with variable execution time. ISLPED Flavius Gruian, Krzysztof Kuchcinski
2002	C	`conf`	Integrating a Computational Model and a Run Time System for Image Processing on a UAV. DSD Per Andersson, Krzysztof Kuchcinski, Klas Nordberg, Patrick Doherty
2001	—	`conf`	A constructive algorithm for memory-aware task assignment and scheduling. CODES Radoslaw Szymanek, Krzysztof Kuchcinski
2001	J	`jnl`	Constraints-driven design space exploration for distributed embedded systems. J. Syst. Archit. Krzysztof Kuchcinski
2001	—	`conf`	LEneS: task scheduling for low-energy systems using variable supply voltage processors. ASP-DAC Flavius Gruian, Krzysztof Kuchcinski
2001	C	`conf`	Synthesis of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs and Constraint Logic Programming. DSD Krzysztof Kuchcinski, Christophe Wolinski
2000	—	`conf`	Digital Systems Design Using Constraint Logic Programming. PACPL Radoslaw Szymanek, Flavius Gruian, Krzysztof Kuchcinski
2000	—	`conf`	Performance Oriented Partitioning for Time-Multiplexed FPGA's. EUROMICRO Per Andersson, Krzysztof Kuchcinski
2000	—	`conf`	Task Assignment and Scheduling under Memory Constraints. EUROMICRO Radoslaw Szymanek, Krzysztof Kuchcinski
2000	A	`conf`	The WITAS Unmanned Aerial Vehicle Project. ECAI Patrik Dohrty, Gösta H. Granlund, Krzysztof Kuchcinski, Erik Sandewall, Klas Nordberg, Erik Skarman, Johan Wiklund
1999	—	`conf`	Design Space Exploration in System Level Synthesis under Memory Constraints. EUROMICRO Radoslaw Szymanek, Krzysztof Kuchcinski
1999	A	`conf`	Integrated Resource Assignment and Scheduling of Task Graphs Using Finite Domain Constraints. DATE Krzysztof Kuchcinski
1999	—	`conf`	Low-Energy Directed Architecture Selection and Task Scheduling for System-Level Design. EUROMICRO Flavius Gruian, Krzysztof Kuchcinski
1999	—	`conf`	Synthesis of Distributed Embedded Systems. EUROMICRO Krzysztof Kuchcinski
1998	—	`conf`	An Approach to High-Level Synthesis Using Constraint Logic Programming. EUROMICRO Krzysztof Kuchcinski
1998	—	`conf`	Operation Binding and Scheduling for Low Power Using Constraint Logic Programming. EUROMICRO Flavius Gruian, Krzysztof Kuchcinski
1998	—	`conf`	Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems. EUROMICRO Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop
1998	A	`conf`	Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems. DATE Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop
1997	—	`conf`	A controller testability analysis and enhancement technique. ED&TC Xinli Gu, Erik Larsson, Krzysztof Kuchcinski, Zebo Peng
1997	J	`jnl`	Design of hardware and software systems. J. Syst. Archit. Krzysztof Kuchcinski
1997	—	`conf`	Embedded System Synthesis by Timing Constraints Solving. ISSS Krzysztof Kuchcinski
1997	J	`jnl`	Post-synthesis back-annotation of timing information in behavioral VHDL. J. Syst. Archit. Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli
1997	J	`jnl`	System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search. Des. Autom. Embed. Syst. Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alexa Doboli
1996	—	`conf`	Automatic Parallelization of a Petri Net-Based Design Representation for High-Level Synthesis. EUROMICRO Peter Grün, Petru Eles, Krzysztof Kuchcinski, Zebo Peng
1996	—	`conf`	Hardware/Software Partitioning with Iterative Improvement Heuristics. ISSS Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alex Doboli
1996	—	`conf`	Hardware/software partitioning of VHDL system specifications. EURO-DAC Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli
1996	J	`jnl`	Synthesis of systems specified as interacting VHDL processes. Integr. Petru Eles, Krzysztof Kuchcinski, Zebo Peng
1995	A	`conf`	An Efficient and Economic Partitioning Approach for Testability. ITC Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
1995	—	`conf`	Timing constraint specification and synthesis in behavioral VHDL. EURO-DAC Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli
1994	J	`jnl`	Automated transformation of algorithms into register-transfer level implementations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zebo Peng, Krzysztof Kuchcinski
1994	—	`conf`	Synthesis of VHDL concurrent processes. EURO-DAC Petru Eles, Marius Minea, Krzysztof Kuchcinski, Zebo Peng
1994	—	`conf`	Testability analysis and improvement from VHDL behavioral specifications. EURO-DAC Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
1993	—	`conf`	Automatic Diagnosis of VLSI Digital Circuits Using Algorithmic Debugging. AADEBUG Krzysztof Kuchcinski, Wlodzimierz Drabent, Jan Maluszynski
1993	J	`jnl`	System level modelling and analysis of complex digital systems. Microprocess. Microprogramming Krzysztof Kuchcinski
1992	J	`jnl`	An approach to testability analysis and improvement for VLSI systems. Microprocess. Microprogramming Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
1992	—	`conf`	Compiling VHDL into a high-level synthesis design representation. EURO-DAC Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Marius Minea
1991	J	`jnl`	Testability measure with reconvergent fanout analysis and its applications. Microprocessing and Microprogramming Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
1990	J	`jnl`	Testability analysis in a VLSI high-level synthesis system. Microprocessing and Microprogramming Krzysztof Kuchcinski, Zebo Peng
1988	J	`jnl`	Parallelism extraction from sequential programs for VLSI applications. Microprocess. Microprogramming Krzysztof Kuchcinski, Zebo Peng
1988	—	`conf`	Path analysis of distributed programs. ACM Conference on Computer Science Krzysztof Kuchcinski, Bogdan Wiszniewski
1987	J	`jnl`	Microprogramming implementation of timed Petri nets. Integr. Krzysztof Kuchcinski, Zebo Peng