Krste Asanovic

173 papers A* 42A 22B 6C 6Misc 4Journal 57Unranked 36

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator Integration. IEEE Micro Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2024	A*	`conf`	FireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs. ISCA Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic
2024	J	`jnl`	Instruction Scheduling in the Saturn Vector Unit. CoRR Jerry Zhao, Daniel Grubb, Miles Rusch, Tianrui Wei, Kevin Anderson, Borivoje Nikolic, Krste Asanovic
2024	—	`conf`	Zoomie: A Software-like Debugging Tool for FPGAs. ASPLOS (3) Tianrui Wei, Kevin Laeufer, Katie Lim, Jerry Zhao, Koushik Sen, Jonathan Balkind, Krste Asanovic
2023	A*	`conf`	AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads. MICRO Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	A*	`conf`	CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems. ISCA Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2023	A*	`conf`	MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. HPCA Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	J	`jnl`	MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. CoRR Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023	A*	`conf`	Profiling Hyperscale Big Data Processing. ISCA Abraham Gonzalez, Aasheesh Kolli, Samira Manabi Khan, Sihang Liu, Vidushi Dadu, Sagar Karandikar, Jichuan Chang, Krste Asanovic, Parthasarathy Ranganathan
2023	J	`jnl`	Special Issue on Hot Chips 34. IEEE Micro Ron Diamant, Krste Asanovic
2022	J	`jnl`	An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET. IEEE J. Solid State Circuits Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woorham Bae, Sean Huang, Vladimir M. Milovanovic, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic
2022	A*	`conf`	Cerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing. CCS Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic
2022	J	`jnl`	Cerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing. CoRR Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic
2022	A*	`conf`	Hammer: a modular and reusable physical design flow tool: invited. DAC Harrison Liew, Daniel Grubb, John Wright, Colin Schmidt, Nayiri Krzysztofowicz, Adam M. Izraelevitz, Edward Wang, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2022	J	`jnl`	Verifying RISC-V Physical Memory Protection. CoRR Kevin Cheang, Cameron Rasmussen, Dayeol Lee, David W. Kohlbrenner, Krste Asanovic, Sanjit A. Seshia
2021	—	`conf`	4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET. ISSCC Colin Schmidt, John Charles Wright, Zhongkai Wang, Eric Chang, Albert J. Ou, Woo-Rham Bae, Sean Huang, Anita Flynn, Brian C. Richards, Krste Asanovic, Elad Alon, Borivoje Nikolic
2021	—	`conf`	A 16mm ESSCIRC Abraham Gonzalez, Jerry Zhao, Ben Korpan, Hasan Genc, Colin Schmidt, John Charles Wright, Ayan Biswas, Alon Amid, Farhana Sheikh, Anton Sorokin, Sirisha Kale, Mani Yalamanchi, Ramya Yarlagadda, Mark Flannigan, Larry Abramowitz, Elad Alon, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
2021	A*	`conf`	A Hardware Accelerator for Protocol Buffers. MICRO Sagar Karandikar, Chris Leary, Chris Kennelly, Jerry Zhao, Dinesh Parimi, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2021	J	`jnl`	Accelerating Genomic Data Analytics With Composable Hardware Acceleration Framework. IEEE Micro Tae Jun Ham, Yejin Lee, Seong Hoon Seo, U. Gyeong Song, Jae W. Lee, David Bruns-Smith, Brendan Sweeney, Krste Asanovic, Young H. Oh, Lisa Wu Wills
2021	J	`jnl`	Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim. IEEE Micro David Biancolin, Albert Magyar, Sagar Karandikar, Alon Amid, Borivoje Nikolic, Jonathan Bachrach, Krste Asanovic
2021	B	`conf`	COBRA: A Framework for Evaluating Compositions of Hardware Branch Predictors. ISPASS Jerry Zhao, Abraham Gonzalez, Alon Amid, Sagar Karandikar, Krste Asanovic
2021	A*	`conf`	Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration. DAC Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2021	C	`conf`	Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs. ISCAS Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic
2020	J	`jnl`	A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. John Charles Wright, Colin Schmidt, Ben Keller, Daniel Palmer Dabbelt, Jaehwa Kwak, Vighnesh Iyer, Nandish Mehta, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Borivoje Nikolic
2020	—	`conf`	An Energy-Efficient RISC-V RV32IMAC Microcontroller for Periodical-Driven Sensing Applications. CICC Ckristian Duran, Megan Wachs, Luis E. Rueda G., Albert Huntington, Javier Ardila, Jack Kang, Andres Amaya, Héctor Gómez, Juan Romero, Laude Fernandez, Felipe Flechas, Rolando Torres, Juan Sebastian Moya, Wilmer Ramirez, Julian Arenas, Juan Gomez, Hanssel Morales, Camilo Rojas, Alex Mantilla, Elkim Roa, Krste Asanovic
2020	—	`conf`	AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning. MLSys Ameer Haj-Ali, Qijing (Jenny) Huang, William S. Moses, John Xiang, Krste Asanovic, John Wawrzynek, Ion Stoica
2020	J	`jnl`	AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning. CoRR Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2020	J	`jnl`	Building Open Trusted Execution Environments. IEEE Secur. Priv. David Kohlbrenner, Shweta Shinde, Dayeol Lee, Krste Asanovic, Dawn Song
2020	J	`jnl`	Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
2020	A*	`conf`	FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design. ASPLOS Sagar Karandikar, Albert J. Ou, Alon Amid, Howard Mao, Randy H. Katz, Borivoje Nikolic, Krste Asanovic
2020	A*	`conf`	Genesis: A Hardware Acceleration Framework for Genomic Data Analysis. ISCA Tae Jun Ham, David Bruns-Smith, Brendan Sweeney, Yejin Lee, Seong Hoon Seo, U. Gyeong Song, Young H. Oh, Krste Asanovic, Jae W. Lee, Lisa Wu Wills
2020	A*	`conf`	Invited: Chipyard - An Integrated SoC Research and Implementation Environment. DAC Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic
2020	A	`conf`	Keystone: an open framework for architecting trusted execution environments. EuroSys Dayeol Lee, David Kohlbrenner, Shweta Shinde, Krste Asanovic, Dawn Song
2020	A	`conf`	NeuroVectorizer: end-to-end vectorization with deep reinforcement learning. CGO Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica
2020	J	`jnl`	ProTuner: Tuning Programs with Monte Carlo Tree Search. CoRR Ameer Haj-Ali, Hasan Genc, Qijing Huang, William S. Moses, John Wawrzynek, Krste Asanovic, Ion Stoica
2020	B	`conf`	RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization. NetSoft Bin Li, Yipeng Wang, Ren Wang, Charlie Tai, Ravi R. Iyer, Zhu Zhou, Andrew Herdrich, Tong Zhang, Ameer Haj-Ali, Ion Stoica, Krste Asanovic
2019	J	`jnl`	A Hardware Accelerator for Tracing Garbage Collection. IEEE Micro Martin Maas, Krste Asanovic, John Kubiatowicz
2019	Misc	`conf`	AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning. FCCM Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2019	J	`jnl`	AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning. CoRR Ameer Haj Ali, Qijing Huang, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2019	J	`jnl`	BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS. IEEE Micro Christopher Celio, Pi-Feng Chiu, Krste Asanovic, Borivoje Nikolic, David A. Patterson
2019	A	`conf`	Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration. ICCAD Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek
2019	J	`jnl`	Co-design of deep neural nets and neural net accelerators for embedded vision applications. IBM J. Res. Dev. Alon Amid, Kiseok Kwon, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer
2019	J	`jnl`	Deep Reinforcement Learning in System Optimization. CoRR Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Joseph Gonzalez, Krste Asanovic, Ion Stoica
2019	A	`conf`	FASED: FPGA-Accelerated Simulation and Evaluation of DRAM. FPGA David Biancolin, Sagar Karandikar, Donggyu Kim, Jack Koenig, Andrew Waterman, Jonathan Bachrach, Krste Asanovic
2019	A*	`conf`	FPGA Accelerated INDEL Realignment in the Cloud. HPCA Lisa Wu, David Bruns-Smith, Frank A. Nothaft, Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krste Asanovic, David A. Patterson, Anthony D. Joseph
2019	J	`jnl`	FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. IEEE Micro Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic
2019	J	`jnl`	Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures. CoRR Hasan Genc, Ameer Haj-Ali, Vighnesh Iyer, Alon Amid, Howard Mao, John Charles Wright, Colin Schmidt, Jerry Zhao, Albert J. Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic
2019	A	`conf`	Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes. ICCAD Albert Magyar, David Biancolin, John Koenig, Sanjit A. Seshia, Jonathan Bachrach, Krste Asanovic
2019	J	`jnl`	Keystone: A Framework for Architecting TEEs. CoRR Dayeol Lee, David Kohlbrenner, Shweta Shinde, Dawn Song, Krste Asanovic
2019	J	`jnl`	NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning. CoRR Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica
2019	A*	`conf`	Open-Source EDA Tools and IP, A View from the Trenches. DAC Elad Alon, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2019	A	`conf`	Sanctorum: A lightweight security monitor for secure enclaves. DATE Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2019	J	`jnl`	Sanctorum: A lightweight security monitor for secure enclaves. IACR Cryptol. ePrint Arch. Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2019	A*	`conf`	Simmani: Runtime Power Modeling for Arbitrary RTL with Automatic Signal Selection. MICRO Donggyu Kim, Jerry Zhao, Jonathan Bachrach, Krste Asanovic
2018	A*	`conf`	A Hardware Accelerator for Tracing Garbage Collection. ISCA Martin Maas, Krste Asanovic, John Kubiatowicz
2018	—	`conf`	An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS. VLSI Circuits Pi-Feng Chiu, Christopher Celio, Krste Asanovic, David A. Patterson, Borivoje Nikolic
2018	J	`jnl`	Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications. CoRR Kiseok Kwon, Alon Amid, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer
2018	A*	`conf`	Co-design of deep neural nets and neural net accelerators for embedded vision applications. DAC Kiseok Kwon, Alon Amid, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer
2018	B	`conf`	DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles. FPL Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach, Krste Asanovic
2018	A*	`conf`	FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. ISCA Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic
2018	—	`conf`	Generating the Next Wave of Custom Silicon. ESSCIRC Borivoje Nikolic, Elad Alon, Krste Asanovic
2018	J	`jnl`	Sanctorum: A lightweight security monitor for secure enclaves. CoRR Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2017	C	`conf`	A Hardware Accelerator for Computing an Exact Dot Product. ARITH Jack Koenig, David Biancolin, Jonathan Bachrach, Krste Asanovic
2017	J	`jnl`	A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. IEEE J. Solid State Circuits Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic
2017	A	`conf`	Cyclist: Accelerating hardware development. ICCAD Jonathan Bachrach, Albert Magyar, Daniel Palmer Dabbelt, Patrick Li, Richard Lin, Krste Asanovic
2017	J	`jnl`	Distributed-Memory Breadth-First Search on Massive Graphs. CoRR Aydin Buluç, Scott Beamer, Kamesh Madduri, Krste Asanovic, David A. Patterson
2017	—	`conf`	Microprocessor chip with photonic I/O. OFC Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael S. Georgas, Andrew S. Waterman, Jeffrey M. Shainline, Rimas R. Avizienis, Sen Lin, Benjamin R. Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry M. Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic
2017	A	`conf`	Reducing Pagerank Communication via Propagation Blocking. IPDPS Scott Beamer, Krste Asanovic, David A. Patterson
2017	J	`jnl`	Reprogrammable Redundancy for SRAM-Based Cache V IEEE J. Solid State Circuits Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic
2017	A	`conf`	Return of the Runtimes: Rethinking the Language Runtime System for the Cloud 3.0 Era. HotOS Martin Maas, Krste Asanovic, John Kubiatowicz
2016	J	`jnl`	A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. IEEE J. Solid State Circuits Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
2016	J	`jnl`	An Agile Approach to Building RISC-V Microprocessors. IEEE Micro Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Rimas Avizienis, Brian C. Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Bora Nikolic, Krste Asanovic
2016	—	`conf`	Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor. A-SSCC Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic
2016	A*	`conf`	Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL. ISCA Donggyu Kim, Adam M. Izraelevitz, Christopher Celio, Hokeun Kim, Brian Zimmer, Yunsup Lee, Jonathan Bachrach, Krste Asanovic
2016	—	`conf`	Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. ESSCIRC Ben Keller, Martin Cochet, Brian Zimmer, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Alberto Puggelli, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic
2016	A*	`conf`	Taurus: A Holistic Language Runtime System for Coordinating Distributed Managed-Language Applications. ASPLOS Martin Maas, Krste Asanovic, Tim Harris, John Kubiatowicz
2016	J	`jnl`	The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V. CoRR Christopher Celio, Daniel Palmer Dabbelt, David A. Patterson, Krste Asanovic
2016	—	`conf`	Vector Processors for Energy-Efficient Embedded Systems. MES@ISCA Daniel Palmer Dabbelt, Colin Schmidt, Eric Love, Howard Mao, Sagar Karandikar, Krste Asanovic
2015	—	`conf`	A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. VLSIC Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
2015	A*	`conf`	DIABLO: A Warehouse-Scale Computer Network Simulator using FPGAs. ASPLOS Zhangxi Tan, Zhenghao Qian, Xi Chen, Krste Asanovic, David A. Patterson
2015	—	`conf`	GAIL: the graph algorithm iron law. IA3@SC Scott Beamer, Krste Asanovic, David A. Patterson
2015	—	`conf`	Locality Exists in Graph Processing: Workload Characterization on an Ivy Bridge Server. IISWC Scott Beamer, Krste Asanovic, David A. Patterson
2015	J	`jnl`	Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors. IEEE Trans. Very Large Scale Integr. Syst. Ruzica Jevtic, Hanh-Phuc Le, Milovan Blagojevic, Stevo Bailey, Krste Asanovic, Elad Alon, Borivoje Nikolic
2015	—	`conf`	Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. Hot Chips Symposium Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic
2015	J	`jnl`	Single-chip microprocessor that communicates directly using light. Nat. Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael Georgas, Andrew Waterman, Jeffrey M. Shainline, Rimas Avizienis, Sen Lin, Benjamin Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic
2015	J	`jnl`	The GAP Benchmark Suite. CoRR Scott Beamer, Krste Asanovic, David A. Patterson
2015	A	`conf`	Trash Day: Coordinating Garbage Collection in Distributed Systems. HotOS Martin Maas, Tim Harris, Krste Asanovic, John Kubiatowicz
2014	—	`conf`	A 45nm 1.3GHz 16.7 double-precision GFLOPS/W RISC-V processor with vector accelerators. ESSCIRC Yunsup Lee, Andrew Waterman, Rimas Avizienis, Henry Cook, Chen Sun, Vladimir Stojanovic, Krste Asanovic
2014	—	`conf`	Author retrospective for optimizing matrix multiply using PHiPAC: a portable high-performance ANSI C coding methodology. ICS 25th Anniversary Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, Jim Demmel
2014	A*	`conf`	Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures. MICRO Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanovic
2014	—	`conf`	Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM. ESSDERC Brian Zimmer, Olivier Thomas, Seng Oon Toh, Taylor Vincent, Krste Asanovic, Borivoje Nikolic
2013	A*	`conf`	A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness. ISCA Henry Cook, Miquel Moretó, Sarah Bird, Khanh Dao, David A. Patterson, Krste Asanovic
2013	A	`conf`	Convergence and scalarization for data-parallel architectures. CGO Yunsup Lee, Ronny Krashinsky, Vinod Grover, Stephen W. Keckler, Krste Asanovic
2013	J	`jnl`	Direction-optimizing breadth-first search. Sci. Program. Scott Beamer, Krste Asanovic, David A. Patterson
2013	—	`conf`	Distributed Memory Breadth-First Search Revisited: Enabling Bottom-Up Search. IPDPS Workshops Scott Beamer, Aydin Buluç, Krste Asanovic, David A. Patterson
2013	J	`jnl`	Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators. ACM Trans. Comput. Syst. Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic
2013	—	`conf`	Measuring the gap between programmable and fixed-function accelerators: A case study on speech recognition. Hot Chips Symposium Yunsup Lee, David Sheffield, Andrew Waterman, Michael J. Anderson, Kurt Keutzer, Krste Asanovic
2013	A*	`conf`	PHANTOM: practical oblivious computation in a secure processor. CCS Martin Maas, Eric Love, Emil Stefanov, Mohit Tiwari, Elaine Shi, Krste Asanovic, John Kubiatowicz, Dawn Song
2013	A*	`conf`	Tessellation: refactoring the OS around explicit resource containers with continuous adaptation. DAC Juan A. Colmenares, Gage Eads, Steven A. Hofmeyr, Sarah Bird, Miquel Moretó, David Chou, Brian Gluzman, Eric Roman, Davide B. Bartolini, Nitesh Mor, Krste Asanovic, John Kubiatowicz
2013	—	`conf`	The RISC-V instruction set. Hot Chips Symposium Andrew Waterman, Yunsup Lee, Rimas Avizienis, Henry Cook, David A. Patterson, Krste Asanovic
2013	—	`conf`	Welcome from general chairs. Hot Chips Symposium Krste Asanovic, Jan-Willem van de Waerdt
2012	A*	`conf`	Chisel: constructing hardware in a Scala embedded language. DAC Jonathan Bachrach, Huy Vo, Brian C. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic
2012	—	`conf`	Context-centric Security. HotSec Mohit Tiwari, Prashanth Mohan, Andrew Osheroff, Hilfi Alkaff, Elaine Shi, Eric Love, Dawn Song, Krste Asanovic
2012	J	`jnl`	Designing Chip-Level Nanophotonic Interconnection Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. Christopher Batten, Ajay Joshi, Vladimir Stojanovic, Krste Asanovic
2012	A	`conf`	Direction-optimizing breadth-first search. SC Scott Beamer, Krste Asanovic, David A. Patterson
2012	C	`conf`	GPUs as an opportunity for offloading garbage collection. ISMM Martin Maas, Philip Reames, Jeffrey Morlan, Krste Asanovic, Anthony D. Joseph, John Kubiatowicz
2012	J	`jnl`	Globally Synchronized Frames for guaranteed quality-of-service in on-chip networks. J. Parallel Distributed Comput. Jae W. Lee, Man Cheuk Ng, Krste Asanovic
2012	J	`jnl`	SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Brian Zimmer, Seng Oon Toh, Huy Vo, Yunsup Lee, Olivier Thomas, Krste Asanovic, Borivoje Nikolic
2011	A*	`conf`	Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators. ISCA Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic
2011	—	`conf`	Real-time Musical Applications on an Experimental Operating System for Multi-Core Processors. ICMC Juan A. Colmenares, Ian Saxton, Eric Battenberg, Rimas Avizienis, Nils Peters, Krste Asanovic, John Kubiatowicz, David Wessel
2011	—	`conf`	Tessellation operating system: Building a real-time, responsive, high-throughput client OS for many-core architectures. Hot Chips Symposium Juan A. Colmenares, Sarah Bird, Gage Eads, Steven A. Hofmeyr, Albert Kim, Rohit Poddar, Hilfi Alkaff, Krste Asanovic, John Kubiatowicz
2011	—	`conf`	The Maven vector-thread architecture. Hot Chips Symposium Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic
2010	A*	`conf`	A case for FAME: FPGA architecture model execution. ISCA Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovic, David A. Patterson
2010	A*	`conf`	Composing parallel software efficiently with lithe. PLDI Heidi Pan, Benjamin Hindman, Krste Asanovic
2010	J	`jnl`	Guest Editors' Introduction: Hot Chips 21. IEEE Micro Krste Asanovic, Ralph Wittig
2010	A*	`conf`	RAMP gold: an FPGA-based architecture simulator for multiprocessors. DAC Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic
2010	A*	`conf`	Re-architecting DRAM memory systems with monolithically integrated silicon photonics. ISCA Scott Beamer, Chen Sun, Yong-jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanovic, Krste Asanovic
2009	J	`jnl`	A view of the parallel computing landscape. Commun. ACM Krste Asanovic, Rastislav Bodík, James Demmel, Tony M. Keaveny, Kurt Keutzer, John Kubiatowicz, Nelson Morgan, David A. Patterson, Koushik Sen, John Wawrzynek, David Wessel, Katherine A. Yelick
2009	J	`jnl`	Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics. IEEE Micro Christopher Batten, Ajay Joshi, Jason Orcutt, Anatol Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic
2009	A	`conf`	Designing multi-socket systems using silicon photonics. ICS Scott Beamer, Krste Asanovic, Christopher Batten, Ajay Joshi, Vladimir Stojanovic
2009	—	`conf`	Silicon-photonic clos networks for global on-chip communication. NOCS Ajay Joshi, Christopher Batten, Yong-jin Kwon, Scott Beamer, Imran Shamim, Krste Asanovic, Vladimir Stojanovic
2008	—	`conf`	Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics. Hot Interconnects Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic
2008	A	`conf`	Compiling for vector-thread architectures. CGO Mark Hampton, Krste Asanovic
2008	A*	`conf`	Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks. ISCA Jae W. Lee, Man Cheuk Ng, Krste Asanovic
2008	J	`jnl`	Implementing the scale vector-thread processor. ACM Trans. Design Autom. Electr. Syst. Ronny Krashinsky, Christopher Batten, Krste Asanovic
2008	C	`conf`	MEMOCODE 2008 Co-Design Contest. MEMOCODE Patrick Schaumont, Krste Asanovic, James C. Hoe
2007	J	`jnl`	Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. IEEE Trans. Very Large Scale Integr. Syst. Seongmoo Heo, Ronny Krashinsky, Krste Asanovic
2007	C	`conf`	Continual hashing for efficient fine-grain state inconsistency detection. ICCD Jae W. Lee, Myron King, Krste Asanovic
2007	J	`jnl`	RAMP: Research Accelerator for Multiple Processors. IEEE Micro John Wawrzynek, David A. Patterson, Mark Oskin, Shih-Lien Lu, Christoforos E. Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanovic
2007	—	`conf`	Transactors for parallel hardware and software co-design. HLDVT Krste Asanovic
2006	B	`conf`	Accelerating architectural exploration using canonical instruction segments. ISPASS Rose F. Liu, Krste Asanovic
2006	B	`conf`	Branch trace compression for snapshot-based simulation. ISPASS Kenneth C. Barr, Krste Asanovic
2006	J	`jnl`	Energy-aware lossless data compression. ACM Trans. Comput. Syst. Kenneth C. Barr, Krste Asanovic
2006	A	`conf`	Implementing virtual memory in a vector processor with software restart markers. ICS Mark Hampton, Krste Asanovic
2006	—	`conf`	METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors. IEEE Real Time Technology and Applications Symposium Jae W. Lee, Krste Asanovic
2006	—	`conf`	Research accelerator for multiple processors. Hot Chips Symposium David A. Patterson, Arvind, Krste Asanovic, Derek Chiou, James C. Hoe, Christos Kozyrakis, Shih-Lien Lu, Mark Oskin, Jan M. Rabaey, John Wawrzynek
2006	—	`conf`	Rethinking Hardware Support for Network Analysis and Intrusion Prevention. HotSec Vern Paxson, Krste Asanovic, Sarang Dharmapurikar, John W. Lockwood, Ruoming Pang, Robin Sommer, Nicholas Weaver
2006	J	`jnl`	Unbounded Transactional Memory. IEEE Micro C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie
2005	J	`jnl`	A Speculative Control Scheme for an Energy-Efficient Banked Register Fil. IEEE Trans. Computers Jessica H. Tseng, Krste Asanovic
2005	B	`conf`	Accelerating Multiprocessor Simulation with a Memory Timestamp Record. ISPASS Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic
2005	J	`jnl`	Controlling program execution through binary instrumentation. SIGARCH Comput. Archit. News Heidi Pan, Krste Asanovic, Robert Cohn, Chi-Keung Luk
2005	A*	`conf`	Mondrix: memory isolation for linux using mondriaan memory protection. SOSP Emmett Witchel, Junghwan Rhee, Krste Asanovic
2005	A	`conf`	Replacing global wires with an on-chip network: a power analysis. ISLPED Seongmoo Heo, Krste Asanovic
2005	A*	`conf`	Unbounded Transactional Memory. HPCA C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie
2005	A*	`conf`	Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. ISCA Michael Zhang, Krste Asanovic
2004	A*	`conf`	Cache Refill/Access Decoupling for Vector Machines. MICRO Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic
2004	A	`conf`	Power-optimal pipelining in deep submicron technology. ISLPED Seongmoo Heo, Krste Asanovic
2004	A*	`conf`	The Vector-Thread Architecture. ISCA Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic
2004	J	`jnl`	The Vector-Thread Architecture. IEEE Micro Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic
2003	A*	`conf`	Banked Multiported Register Files for High-Frequency Superscalar Microprocessors. ISCA Jessica H. Tseng, Krste Asanovic
2003	A	`conf`	Energy Aware Lossless Data Compression. MobiSys Kenneth C. Barr, Krste Asanovic
2003	A	`conf`	Hardware Works, Software Doesn't: Enforcing Modularity with Mondriaan Memory Protection. HotOS Emmett Witchel, Krste Asanovic
2003	A	`conf`	Reducing power density through activity migration. ISLPED Seongmoo Heo, Kenneth C. Barr, Krste Asanovic
2002	A*	`conf`	Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines. ISCA Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste Asanovic
2002	A	`conf`	Fine-grain CAM-tag cache resizing using miss tags. ISLPED Michael Zhang, Krste Asanovic
2002	A*	`conf`	Mondrian memory protection. ASPLOS Emmett Witchel, Josh Cates, Krste Asanovic
2001	—	`conf`	Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. ARVLSI Seongmoo Heo, Ronny Krashinsky, Krste Asanovic
2001	A*	`conf`	Direct addressed caches for reduced power consumption. MICRO Emmett Witchel, Samuel Larsen, C. Scott Ananian, Krste Asanovic
2001	Misc	`conf`	Heads and tails: a variable-length instruction format supporting parallel fetch and decode. CASES Heidi Pan, Krste Asanovic
2001	J	`jnl`	Multithreading decoupled architectures for complexity-effective general purpose computing. SIGARCH Comput. Archit. News Michael Sung, Ronny Krashinsky, Krste Asanovic
2000	A*	`conf`	Dynamic zero compression for cache energy reduction. MICRO Luis Villa, Michael Zhang, Krste Asanovic
2000	—	`conf`	Energy-Efficient Register Access. SBCCI Jessica H. Tseng, Krste Asanovic
1997	Misc	`conf`	A Fast Kohonen Net Implementation for Spert-II. IWANN Krste Asanovic
1997	C	`conf`	Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. ICCD David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David R. Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick
1997	A	`conf`	Optimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology. International Conference on Supercomputing Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel
1997	J	`jnl`	Scalable Processors in the Billion-Transistor Era: IRAM. Computer Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick
1997	Misc	`conf`	Using PHiPAC to speed error back-propagation learning. ICASSP Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel
1996	J	`jnl`	Spert-II: A Vector Microprocessor System. Computer John Wawrzynek, Krste Asanovic, Brian Kingsbury, David Johnson, James Beck, Nelson Morgan
1995	—	`conf`	SPERT-II: A Vector Microprocessor System and its Application to Large Problems in Backpropagation Training. NIPS John Wawrzynek, Krste Asanovic, Brian Kingsbury, James Beck, David Johnson, Nelson Morgan
1993	J	`jnl`	Designing A Connectionist Network Supercomputer. Int. J. Neural Syst. Krste Asanovic, James Beck, Jerry Feldman, Nelson Morgan, John Wawrzynek
1993	J	`jnl`	The design of a neuro-microprocessor. IEEE Trans. Neural Networks John Wawrzynek, Krste Asanovic, Nelson Morgan
1993	J	`jnl`	Using simulations of reduced precision arithmetic to design a neuro-microprocessor. J. VLSI Signal Process. Krste Asanovic, Nelson Morgan, John Wawrzynek
1992	—	`conf`	SPERT: a VLIW/SIMD microprocessor for artificial neural network computations. ASAP Krste Asanovic, James Beck, Brian Kingsbury, Phil Kohn, Nelson Morgan, John Wawrzynek