Krishnan Ravichandran

50 papers Journal 19Unranked 31
YearRankTypeTitle / Venue / Authors
2025 — conf
8.8 Fine-Grained Spatial and Temporal Thermal Profiling of a 16nm CMOS Buck Converter and SoC Load-Current Emulator Using Low-Voltage Micron-Scale Thermal Sensors.
ISSCC
Zakir K. Ahmed, Suhwan Kim, Charles Augustine, Harish K. Krishnamurthy, Krishnan Ravichandran, James W. Tschanz, Vivek De
2025 J jnl
A Monolithic 5.7 A/mm
IEEE J. Solid State Circuits
Xiaosen Liu, Jingshu Yu, Minxiang Gong, Nicolas Butzen, Sheldon Weng, Harish K. Krishnamurthy, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Christopher Pelto, James W. Tschanz, Vivek De
2025 J jnl
A Monolithic, 10.5 W/mm
IEEE J. Solid State Circuits
Suhwan Kim, Harish K. Krishnamurthy, Zakir K. Ahmed, Nachiket V. Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2024 — conf
14.9 A Monolithic 10.5W/mm
ISSCC
Suhwan Kim, Harish K. Krishnamurthy, Zakir K. Ahmed, Nachiket V. Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2024 — conf
28.4 A Monolithic 12.7W/mm
ISSCC
Nicolas Butzen, Harish Krishnamurthy, Jingshu Yu, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Chris Pelto, James W. Tschanz
2024 — conf
A 5.4V-Vin, 9.3A/mm
VLSI Technology and Circuits
Sally Amin, Harish Krishnamurthy, Huong T. Do, Claudio Alvarez, Mike Hill, Kaladhar Radhakrishnan, Vivek De, Sheldon Weng, Krishnan Ravichandran, Jim Tschanz, Wilfred Gomes, Jonathan Douglas
2024 J jnl
A Monolithic 12.7 W/mm
IEEE J. Solid State Circuits
Nicolas Butzen, Harish K. Krishnamurthy, Jingshu Yu, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Christopher Pelto, James W. Tschanz
2024 — conf
A Monolithic 5.7A/mm
VLSI Technology and Circuits
Jingshu Yu, Xiaosen Liu, Minxiang Gong, Nicolas Butzen, Sheldon Weng, Harish K. Krishnamurthy, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, Jim Waldemer, Christopher Pelto, James W. Tschanz, Vivek De
2023 — conf
A 1.8W High-Frequency SIMO Converter Featuring Digital Sensor-Less Computational Zero-Current Operation and Non-Linear Duty-Boost.
ISSCC
Suhwan Kim, Harish K. Krishnamurthy, Sergey Sofer, Sheldon Weng, Shahar Wolf, Ashoke Ravi, Krishnan Ravichandran, Ofir Degani, James W. Tschanz, Vivek De
2023 — conf
A Monolithic 26A/mm
ISSCC
Nicolas Butzen, Harish Krishnamurthy, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Michael Zelikson, James W. Tschanz, Jonathan Douglas
2022 — conf
A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.
ISSCC
Xiaosen Liu, Harish Krishnamurthy, Renzhi Liu, Krishnan Ravichandran, Zakir K. Ahmed, Nachiket V. Desai, Nicolas Butzen, James W. Tschanz, Vivek De
2022 J jnl
A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors.
IEEE J. Solid State Circuits
Nachiket V. Desai, Han Wui Then, Jingshu Yu, Harish K. Krishnamurthy, William J. Lambert, Nicolas Butzen, Sheldon Weng, Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2022 — conf
Fully Integrated Voltage Regulators with Package-Embedded Inductors for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm CMOS Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled ON-Time Discontinuous Conduction Mode (DCM) Operation.
VLSI Technology and Circuits
Nachiket V. Desai, Harish K. Krishnamurthy, Suhwan Kim, Christopher Schaef, Sheldon Weng, Beomseok Choi, William J. Lambert, Krishnan Ravichandran, James W. Tschanz, Vivek De
2021 — conf
17.4 Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing.
ISSCC
Nachiket V. Desai, Harish K. Krishnamurthy, Khondker Zakir Ahmed, Sheldon Weng, Suhwan Kim, Xiaosen Liu, Huong T. Do, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2021 — conf
A 1S Direct-Battery-Attach Integrated Buck Voltage Regulator with 5-Stack Thin-Gate 22nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers.
VLSI Circuits
Suhwan Kim, Harish Krishnamurthy, Sally Amin, Sheldon Weng, Jin Feng, Huong T. Do, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2021 — conf
A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors.
VLSI Circuits
Nachiket V. Desai, Harish K. Krishnamurthy, William J. Lambert, Jingshu Yu, Han Wui Then, Nicolas Butzen, Sheldon Weng, Christopher Schaef, N. Nidhi, Marko Radosavljevic, Johann Rode, Justin Sandford, Kaladhar Radhakrishnan, Krishnan Ravichandran, Bernhard Sell, James W. Tschanz, Vivek De
2021 — conf
A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction.
VLSI Circuits
Khondker Zakir Ahmed, Nachiket V. Desai, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Krishnan Ravichandran, James W. Tschanz, Vivek De
2021 J jnl
A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS.
IEEE J. Solid State Circuits
Raghavan Kumar, Xiaosen Liu, Vikram B. Suresh, Harish K. Krishnamurthy, Sudhir Satpathy, Mark A. Anders, Himanshu Kaul, Krishnan Ravichandran, Vivek De, Sanu K. Mathew
2021 J jnl
A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning.
IEEE J. Solid State Circuits
Xiaosen Liu, Harish K. Krishnamurthy, Taesik Na, Sheldon Weng, Khondker Zakir Ahmed, Christopher Schaef, Krishnan Ravichandran, James W. Tschanz, Vivek De
2020 — conf
A Dual-Rail Hybrid Analog/Digital LDO with Dynamic Current Steering for Tunable High PSRR and High Efficiency.
VLSI Circuits
Xiaosen Liu, Harish K. Krishnamurthy, Claudia P. Barrera, Jing Han, Rajasekhara M. Narayana Bhatla, Scott Chiu, Zakir K. Ahmed, Krishnan Ravichandran, James W. Tschanz, Vivek De
2020 — conf
A SCA-Resistant AES Engine in 14nm CMOS with Time/Frequency-Domain Leakage Suppression using Non-Linear Digital LDO Cascaded with Arithmetic Countermeasures.
VLSI Circuits
Raghavan Kumar, Xiaosen Liu, Vikram B. Suresh, Harish Krishnamurthy, Mark A. Anders, Himanshu Kaul, Krishnan Ravichandran, Vivek De, Sanu Mathew
2020 J jnl
A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response.
IEEE J. Solid State Circuits
Khondker Zakir Ahmed, Harish K. Krishnamurthy, Charles Augustine, Xiaosen Liu, Sheldon Weng, Krishnan Ravichandran, James W. Tschanz, Vivek De
2020 — conf
An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering.
VLSI Circuits
Zakir K. Ahmed, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Christopher Schaef, Nachiket V. Desai, Krishnan Ravichandran, James W. Tschanz, Vivek De
2020 — conf
Digital Control of Switching and Linear Integrated Voltage Regulators.
CICC
Harish K. Krishnamurthy, Zakir A. Khondker, Xiaosen Liu, Nachiket V. Desai, Suhwan Kim, Nicolas Butzen, Sally Amin, Sheldon Weng, Krishnan Ravichandran, James W. Tschanz, Vivek De
2020 — conf
Self-Powered IOT System for Edge Inference.
ISQED
Dileep Kurian, Tanay Karnik, Saksham Soni, Saransh Chhabra, Suhwan Kim, Jaykant Timbadiya, Ankit Gupta, Krishnan Ravichandran, Mukesh Bhartiya, Angela Nicoara
2019 — conf
A 93.8% Peak Efficiency, 5V-Input, 10A Max ILOAD Flying Capacitor Multilevel Converter in 22nm CMOS Featuring Wide Output Voltage Range and Flying Capacitor Precharging.
ISSCC
Christopher Schaef, Sheldon Weng, Beomseok Choi, William J. Lambert, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2019 — conf
A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode Operation.
ISSCC
Christopher Schaef, Nachiket V. Desai, Harish Krishnamurthy, Sheldon Weng, Huong T. Do, William J. Lambert, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2019 J jnl
A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors.
IEEE J. Solid State Circuits
Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De, Nachiket V. Desai, Harish K. Krishnamurthy, Xiaosen Liu, Khondker Zakir Ahmed, Suhwan Kim, Sheldon Weng, Huong T. Do, William J. Lambert
2019 — conf
A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation.
ISSCC
Xiaosen Liu, Harish K. Krishnamurthy, Taesik Na, Sheldon Weng, Khondker Zakir Ahmed, Krishnan Ravichandran, James W. Tschanz, Vivek De
2019 — conf
A Variation-Adaptive Integrated Computational Digital LDO in 22nm CMOS with Fast Transient Response.
VLSI Circuits
Zakir K. Ahmed, Harish K. Krishnamurthy, Charles Augustine, Xiaosen Liu, Sheldon Weng, Krishnan Ravichandran, James W. Tschanz, Vivek De
2019 J jnl
An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V}_{\text{MIN}}$ Optimization.
IEEE J. Solid State Circuits
Pascal Andreas Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav A. Vaidya, Ashwin Mendon, Deepak Mathaikutty, Jaydeep P. Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph F. Ryan, Chung-Ching Peng, Somnath Paul, Sriram R. Vangal, Brando Perez Esparza, Luis Cuellar, Michael Woodman, Bala Iyer, Subramaniam Maiyuran, Gautham N. Chinya, Xiang Zou, Yuyun Liao, Krishnan Ravichandran, Hong Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De
2018 — conf
A 99.2% Tracking Accuracy Single-Inductor Quadruple-Input-Quadruple-Output Buck-Boost Converter Topology with Periodical Interval Perturbation and Observation MPPT.
A-SSCC
Chao-Jen Huang, Yao-Sheng Ma, Wen-Hau Yang, Yen-Ting Lin, Chun-Chieh Kuo, Ke-Horng Chen, Hsiao-Jung Liu, Pei-Shan Yu, Fang-Chih Chu, Ching-Ju Lin, Hong-Wen Huang, Kuo-Chih Hung, Yuan-Hua Chu, Ying-Hsi Lin, Suhwan Kim, Krishnan Ravichandran
2018 J jnl
A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS.
IEEE J. Solid State Circuits
Harish Kumar Krishnamurthy, Sheldon Weng, George E. Matthew, Nachiket V. Desai, Ruchir Saraswat, Krishnan Ravichandran, James W. Tschanz, Vivek De
2018 J jnl
A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS.
IEEE J. Solid State Circuits
Harish Kumar Krishnamurthy, Vaibhav A. Vaidya, Pavan Kumar, Rinkle Jain, Sheldon Weng, Stephen T. Kim, George E. Matthew, Nachiket V. Desai, Xiaosen Liu, Krishnan Ravichandran, James W. Tschanz, Vivek De
2018 — conf
A Single-Stage, Single-Inductor, 6-Input 9-Output Multi-Modal Energy Harvesting Power Management IC for 100µW-120MW Battery-Powered IoT Edge Nodes.
VLSI Circuits
Suhwan Kim, Vaibhav A. Vaidya, Christopher Schaef, Andrew Lines, Harish Krishnamurthy, Sheldon Weng, Xiaosen Liu, Dileep Kurian, Tanay Karnik, Krishnan Ravichandran, James W. Tschanz, Vivek De
2018 J jnl
A Switched Capacitor Energy Harvester Based on a Single-Cycle Criterion for MPPT to Eliminate Storage Capacitor.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaosen Liu, Krishnan Ravichandran, Edgar Sánchez-Sinencio
2018 J jnl
An Integrated Concurrent Multiple-Input Self-Startup Energy Harvesting Capacitive-Based DC Adder Combiner.
IEEE Trans. Ind. Electron.
Mohamed Abouzied, Hatem Osman, Vaibhav A. Vaidya, Krishnan Ravichandran, Edgar Sánchez-Sinencio
2018 — conf
An energy-efficient graphics processor featuring fine-grain DVFS with integrated voltage regulators, execution-unit turbo, and retentive sleep in 14nm tri-gate CMOS.
ISSCC
Pascal Meinerzhagen, Carlos Tokunaga, Andres Malavasi, Vaibhav A. Vaidya, Ashwin Mendon, Deepak Mathaikutty, Jaydeep P. Kulkarni, Charles Augustine, Minki Cho, Stephen T. Kim, George E. Matthew, Rinkle Jain, Joseph F. Ryan, Chung-Ching Peng, Somnath Paul, Sriram R. Vangal, Brando Perez Esparza, Luis Cuellar, Michael Woodman, Bala Iyer, Subramaniam Maiyuran, Gautham N. Chinya, Chris Zou, Yuyun Liao, Krishnan Ravichandran, Hong Wang, Muhammad M. Khellah, James W. Tschanz, Vivek De
2017 — conf
20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS.
ISSCC
Harish Kumar Krishnamurthy, Vaibhav A. Vaidya, Sheldon Weng, Krishnan Ravichandran, Pavan Kumar, Stephen T. Kim, Rinkle Jain, George E. Matthew, Jim Tschanz, Vivek De
2017 J jnl
A Fully Integrated Reconfigurable Self-Startup RF Energy-Harvesting System With Storage Capability.
IEEE J. Solid State Circuits
Mohamed Abouzied, Krishnan Ravichandran, Edgar Sánchez-Sinencio
2017 J jnl
Postsilicon Voltage Guard-Band Reduction in a 22 nm Graphics Execution Core Using Adaptive Voltage Scaling and Dynamic Power Gating.
IEEE J. Solid State Circuits
Minki Cho, Stephen T. Kim, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De
2016 — conf
8.4 Post-silicon voltage-guard-band reduction in a 22nm graphics execution core using adaptive voltage scaling and dynamic power gating.
ISSCC
Minki Cho, Stephen T. Kim, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De
2016 J jnl
A Highly Efficient Reconfigurable Charge Pump Energy Harvester With Wide Harvesting Range and Two-Dimensional MPPT for Internet of Things.
IEEE J. Solid State Circuits
Xiaosen Liu, Lilly Huang, Krishnan Ravichandran, Edgar Sánchez-Sinencio
2016 J jnl
Enabling Wide Autonomous DVFS in a 22 nm Graphics Execution Core Using a Digitally Controlled Fully Integrated Voltage Regulator.
IEEE J. Solid State Circuits
Stephen T. Kim, Yi-Chun Shih, Kaushik Mazumdar, Rinkle Jain, Joseph F. Ryan, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De
2016 J jnl
Universal Current-Mode Control Schemes to Charge Li-Ion Batteries Under DC/PV Source.
IEEE Trans. Circuits Syst. I Regul. Pap.
Suvankar Biswas, Lilly Huang, Vaibhav A. Vaidya, Krishnan Ravichandran, Ned Mohan, Sairaj V. Dhople
2015 — conf
8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigation.
ISSCC
Stephen T. Kim, Yi-Chun Shih, Kaushik Mazumdar, Rinkle Jain, Joseph F. Ryan, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De
2015 — conf
A 0.4V∼1V 0.2A/mm
CICC
Pavan Kumar, Vaibhav A. Vaidya, Harish Krishnamurthy, Stephen T. Kim, George E. Matthew, Sheldon Weng, Bharani Thiruvengadam, Wayne Proefrock, Krishnan Ravichandran, Vivek De
2015 J jnl
Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS.
IEEE J. Solid State Circuits
Rinkle Jain, Stephen T. Kim, Vaibhav A. Vaidya, Krishnan Ravichandran, James W. Tschanz, Vivek De
2014 — conf
A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS.
VLSIC
Harish Krishnamurthy, Vaibhav A. Vaidya, Pavan Kumar, George E. Matthew, Sheldon Weng, Bharani Thiruvengadam, Wayne Proefrock, Krishnan Ravichandran, Vivek De
2014 — conf
Conductance modulation techniques in switched-capacitor DC-DC converter for maximum-efficiency tracking and ripple mitigation in 22nm Tri-gate CMOS.
CICC
Rinkle Jain, Stephen T. Kim, Vaibhav A. Vaidya, James W. Tschanz, Krishnan Ravichandran, Vivek De