Kris Gaj - RankMe

163 papers A* 2A 20B 12C 13Misc 6Journal 54Unranked 55

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Lightweight Champions of the World: Side-Channel Resistant Open Hardware for Finalists in the NIST Lightweight Cryptography Standardization Process. ACM Trans. Embed. Comput. Syst. Kamyar Mohajerani, Luke Beckwith, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2024	J	`jnl`	Hardware Accelerators for Digital Signature Algorithms Dilithium and FALCON. IEEE Des. Test Luke Beckwith, Duc Tri Nguyen, Kris Gaj
2024	—	`conf`	Power Side-Channel Key Recovery Attack on a Hardware Implementation of BIKE. AsianHOST Luke Beckwith, Huizhen Zhou, Jens-Peter Kaps, Kris Gaj
2024	J	`jnl`	Universal Gaussian elimination hardware for cryptographic purposes. J. Cryptogr. Eng. Jingwei Hu, Wen Wang, Kris Gaj, Donglong Chen, Huaxiong Wang
2023	C	`conf`	A High-Performance Hardware Implementation of the LESS Digital Signature Scheme. PQCrypto Luke Beckwith, Robert Wallace, Kamyar Mohajerani, Kris Gaj
2023	J	`jnl`	Engineering Practical Rank-Code-Based Cryptographic Schemes on Embedded Hardware. A Case Study on ROLLO. IEEE Trans. Computers Jingwei Hu, Wen Wang, Kris Gaj, Liping Wang, Huaxiong Wang
2023	—	`conf`	Fast Falcon Signature Generation and Verification Using ARMv8 NEON Instructions. AFRICACRYPT Duc Tri Nguyen, Kris Gaj
2023	J	`jnl`	High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber. IEEE Trans. Computers Viet Ba Dang, Kamyar Mohajerani, Kris Gaj
2023	J	`jnl`	SCA Evaluation and Benchmarking of Finalists in the NIST Lightweight Cryptography Standardization Process. IACR Cryptol. ePrint Arch. Kamyar Mohajerani, Luke Beckwith, Abubakr Abdulgadir, Eduardo Ferrufino, Jens-Peter Kaps, Kris Gaj
2022	—	`conf`	CRC-Oriented Error Detection Architectures of Post-quantum Cryptography Niederreiter Key Generator on FPGA. NorCAS Alvaro Cintas Canto, Mehran Mozaffari Kermani, Reza Azarderakhsh, Kris Gaj
2022	J	`jnl`	High-Performance Hardware Implementation of Lattice-Based Digital Signatures. IACR Cryptol. ePrint Arch. Luke Beckwith, Duc Tri Nguyen, Kris Gaj
2022	—	`conf`	Session details: Session 1A: Hardware Security. ACM Great Lakes Symposium on VLSI Kris Gaj
2022	—	`conf`	Session details: Session 2A: Hardware Security. ACM Great Lakes Symposium on VLSI Kris Gaj
2022	—	`conf`	Session details: Session 5A: Hardware Security. ACM Great Lakes Symposium on VLSI Kris Gaj
2022	J	`jnl`	Universal Gaussian Elimination Hardware for Cryptographic Purposes. IACR Cryptol. ePrint Arch. Jingwei Hu, Wen Wang, Kris Gaj, Donglong Chen, Huaxiong Wang
2021	Misc	`conf`	A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. INDOCRYPT Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, Kris Gaj
2021	J	`jnl`	A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. IACR Cryptol. ePrint Arch. Abubakr Abdulgadir, Kamyar Mohajerani, Viet Ba Dang, Jens-Peter Kaps, Kris Gaj
2021	J	`jnl`	A Multiplatform Parallel Approach for Lattice Sieving Algorithms. IACR Cryptol. ePrint Arch. Michal Andrzejczak, Kris Gaj
2021	C	`conf`	Fast NEON-Based Multiplication for Lattice-Based NIST Post-quantum Cryptography Finalists. PQCrypto Duc Tri Nguyen, Kris Gaj
2021	A	`conf`	Hardware Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process. DATE Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2021	—	`conf`	High-Performance Hardware Implementation of CRYSTALS-Dilithium. FPT Luke Beckwith, Duc Tri Nguyen, Kris Gaj
2021	J	`jnl`	High-Performance Hardware Implementation of CRYSTALS-Dilithium. IACR Cryptol. ePrint Arch. Luke Beckwith, Duc Tri Nguyen, Kris Gaj
2021	J	`jnl`	High-Speed Hardware Architectures and FPGA Benchmarking of CRYSTALS-Kyber, NTRU, and Saber. IACR Cryptol. ePrint Arch. Viet Ba Dang, Kamyar Mohajerani, Kris Gaj
2021	—	`conf`	Side-channel Resistant Implementations of a Novel Lightweight Authenticated Cipher with Application to Hardware Security. ACM Great Lakes Symposium on VLSI Abubakr Abdulgadir, Sammy Lin, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj
2020	—	`conf`	A Multiplatform Parallel Approach for Lattice Sieving Algorithms. ICA3PP (1) Michal Andrzejczak, Kris Gaj
2020	J	`jnl`	FPGA Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process: Methodology, Metrics, Tools, and Results. IACR Cryptol. ePrint Arch. Kamyar Mohajerani, Richard Haeussler, Rishub Nagpal, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2020	—	`conf`	High-Level Synthesis in Implementing and Benchmarking Number Theoretic Transform in Lattice-Based Post-Quantum Cryptography Using Software/Hardware Codesign. ARC Duc Tri Nguyen, Viet Ba Dang, Kris Gaj
2020	J	`jnl`	Implementation and Benchmarking of Round 2 Candidates in the NIST Post-Quantum Cryptography Standardization Process Using Hardware and Software/Hardware Co-design Approaches. IACR Cryptol. ePrint Arch. Viet Ba Dang, Farnoud Farahmand, Michal Andrzejczak, Kamyar Mohajerani, Duc Tri Nguyen, Kris Gaj
2020	—	`conf`	Lightweight Implementation of the LowMC Block Cipher Protected Against Side-Channel Attacks. ASHES@CCS Javad Bahrami, Viet Ba Dang, Abubakr Abdulgadir, Khaled N. Khasawneh, Jens-Peter Kaps, Kris Gaj
2020	A	`conf`	Sampling from Discrete Distributions in Combinational Hardware with Application to Post-Quantum Cryptography. DATE Michael X. Lyons, Kris Gaj
2020	Misc	`conf`	Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography. VTS Jiafeng Xie, Kanad Basu, Kris Gaj, Ujjwal Guin
2019	J	`jnl`	A Comprehensive Framework for Fair and Efficient Benchmarking of Hardware Implementations of Lightweight Cryptography. IACR Cryptol. ePrint Arch. Jens-Peter Kaps, William Diehl, Michael Tempelmeier, Farnoud Farahmand, Ekawat Homsirikamol, Kris Gaj
2019	—	`conf`	A High-Level Synthesis Approach to the Software/Hardware Codesign of NTT-Based Post-Quantum Cryptography Algorithms. FPT Duc Tri Nguyen, Viet Ba Dang, Kris Gaj
2019	J	`jnl`	A High-Speed Constant-Time Hardware Implementation of NTRUEncrypt SVES. IACR Cryptol. ePrint Arch. Farnoud Farahmand, Malik Umar Sharif, Kevin Briggs, Kris Gaj
2019	—	`conf`	An Automated Scheduler-Based Approach for the Development of Cryptoprocessors for Pairing-Based Cryptosystems. IPDPS Workshops Theodore Winograd, Rabia Shahid, Kris Gaj
2019	A	`conf`	COMA: Communication and Obfuscation Management Architecture. RAID Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
2019	J	`jnl`	COMA: Communication and Obfuscation Management Architecture. CoRR Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
2019	—	`conf`	DAGS: Reloaded Revisiting Dyadic Key Encapsulation. CBC Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiécoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini
2019	C	`conf`	Evaluating the Potential for Hardware Acceleration of Four NTRU-Based Key Encapsulation Mechanisms Using Software/Hardware Codesign. PQCrypto Farnoud Farahmand, Viet Ba Dang, Duc Tri Nguyen, Kris Gaj
2019	J	`jnl`	Face-off between the CAESAR Lightweight Finalists: ACORN vs. Ascon. IACR Cryptol. ePrint Arch. William Diehl, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2019	—	`conf`	Full hardware implementation of the Post-Quantum Public-Key Cryptography Scheme Round5. ReConFig Michal Andrzejczak, Farnoud Farahmand, Kris Gaj
2019	—	`conf`	Implementing and Benchmarking Three Lattice-Based Post-Quantum Cryptography Algorithms Using Software/Hardware Codesign. FPT Viet Ba Dang, Farnoud Farahmand, Michal Andrzejczak, Kris Gaj
2019	B	`conf`	Software/Hardware Codesign of the Post Quantum Cryptography Algorithm NTRUEncrypt Using High-Level Synthesis and Register-Transfer Level Design Methodologies. FPL Farnoud Farahmand, Duc Tri Nguyen, Viet Ba Dang, Ahmed Ferozpuri, Kris Gaj
2018	—	`conf`	A High-Speed Constant-Time Hardware Implementation of NTRUEncrypt SVES. FPT Farnoud Farahmand, Malik Umar Sharif, Kevin Briggs, Kris Gaj
2018	C	`conf`	Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. IOLTS Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	J	`jnl`	Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. CoRR Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	—	`conf`	Challenges and Rewards of Implementing and Benchmarking Post-Quantum Cryptography in Hardware. ACM Great Lakes Symposium on VLSI Kris Gaj
2018	J	`jnl`	Comparing the Cost of Protecting Selected Lightweight Block Ciphers against Differential Power Analysis in Low-Cost FPGAs. Comput. William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2018	J	`jnl`	Comparison of Cost of Protection Against Differential Power Analysis of Selected Authenticated Ciphers. IACR Cryptol. ePrint Arch. William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj
2018	J	`jnl`	Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers. Cryptogr. William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj
2018	—	`conf`	Comparison of cost of protection against differential power analysis of selected authenticated ciphers. HOST William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps, Kris Gaj
2018	J	`jnl`	DAGS: Key encapsulation using dyadic GS codes. J. Math. Cryptol. Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiécoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini
2018	J	`jnl`	DAGS: Reloaded Revisiting Dyadic Key Encapsulation. IACR Cryptol. ePrint Arch. Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiecoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini
2018	—	`conf`	Face-off Between the CAESAR Lightweight Finalists: ACORN vs. Ascon. FPT Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2018	—	`conf`	Fixing the CLOC with Fine-grain Leakage Analysis. ASHES@CCS William Diehl, Farnoud Farahmand, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2018	—	`conf`	High-speed FPGA Implementation of the NIST Round 1 Rainbow Signature Scheme. ReConFig Ahmed Ferozpuri, Kris Gaj
2018	Misc	`conf`	Improved Lightweight Implementations of CAESAR Authenticated Ciphers. FCCM Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2018	J	`jnl`	Improved Lightweight Implementations of CAESAR Authenticated Ciphers. IACR Cryptol. ePrint Arch. Farnoud Farahmand, William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2018	—	`conf`	LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. ISVLSI Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	J	`jnl`	LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
2017	—	`conf`	A Generic Approach to the Development of Coprocessors for Elliptic Curve Cryptosystems. IPDPS Workshops Rabia Shahid, Ted Winograd, Kris Gaj
2017	J	`jnl`	A comprehensive set of schemes for PUF response generation. Microprocess. Microsystems Bilal Habib, Kris Gaj
2017	—	`conf`	A scalable ECC processor implementation for high-speed and lightweight with side-channel countermeasures. ReConFig Ahmad Salman, Ahmed Ferozpuri, Ekawat Homsirikamol, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj
2017	C	`conf`	Analysis and Inner-Round Pipelined Implementation of Selected Parallelizable CAESAR Competition Candidates. DSD Sanjay Deshpande, Kris Gaj
2017	J	`jnl`	Area-oriented comparison of lightweight block ciphers implemented in hardware for the activation mechanism in the anti-counterfeiting schemes. Int. J. Circuit Theory Appl. Cédric Marchand, Lilian Bossuet, Kris Gaj
2017	—	`conf`	Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs. FPT William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2017	B	`conf`	Comparison of hardware and software implementations of selected lightweight block ciphers. FPL William Diehl, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj
2017	J	`jnl`	DAGS: Key Encapsulation using Dyadic GS Codes. IACR Cryptol. ePrint Arch. Gustavo Banegas, Paulo S. L. M. Barreto, Brice Odilon Boidje, Pierre-Louis Cayrel, Gilbert Ndollane Dione, Kris Gaj, Cheikh Thiecoumba Gueye, Richard Haeussler, Jean Belo Klamti, Ousmane Ndiaye, Duc Tri Nguyen, Edoardo Persichetti, Jefferson E. Ricardini
2017	J	`jnl`	Implementation of efficient SR-Latch PUF on FPGA and SoC devices. Microprocess. Microsystems Bilal Habib, Jens-Peter Kaps, Kris Gaj
2017	—	`conf`	Minerva: Automated hardware optimization tool. ReConFig Farnoud Farahmand, Ahmed Ferozpuri, William Diehl, Kris Gaj
2017	J	`jnl`	RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers. Microprocess. Microsystems William Diehl, Kris Gaj
2017	—	`conf`	Selection of an error-correcting code for FPGA-based physical unclonable functions. FPT Brian Jarvis, Kris Gaj
2017	—	`conf`	Side-channel resistant soft core processor for lightweight block ciphers. ReConFig William Diehl, Abubakr Abdulgadir, Jens-Peter Kaps, Kris Gaj
2017	—	`conf`	Toward a new HLS-based methodology for FPGA benchmarking of candidates in cryptographic competitions: The CAESAR contest case study. FPT Ekawat Homsirikamol, Kris Gaj
2016	—	`conf`	A Comprehensive Set of Schemes for PUF Response Generation. ARC Bilal Habib, Kris Gaj
2016	—	`conf`	A Zynq-based testbed for the experimental benchmarking of algorithms competing in cryptographic contests. ReConFig Farnoud Farahmand, Ekawat Homsirikamol, Kris Gaj
2016	Misc	`conf`	AEZ: Anything-But EaZy in Hardware. INDOCRYPT Ekawat Homsirikamol, Kris Gaj
2016	J	`jnl`	CAESAR Hardware API. IACR Cryptol. ePrint Arch. Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Panasayya Yalla, Jens-Peter Kaps, Kris Gaj
2016	B	`conf`	Hardware-software codesign of RSA for optimal performance vs. flexibility trade-off. FPL Malik Umar Sharif, Rabia Shahid, Kris Gaj, Marcin Rogawski
2016	Misc	`conf`	High-Speed RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two. FCCM William Diehl, Kris Gaj
2016	A*	`conf`	Hybrid STT-CMOS designs for reverse-engineering prevention. DAC Theodore Winograd, Hassan Salmani, Hamid Mahmoodi, Kris Gaj, Houman Homayoun
2016	C	`conf`	Implementation of a Boolean Masking Scheme for the SCREAM Cipher. DSD William Diehl, Kris Gaj
2016	C	`conf`	RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two. DSD William Diehl, Kris Gaj
2015	—	`conf`	A universal hardware API for authenticated ciphers. ReConFig Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Malik Umar Sharif, Kris Gaj
2015	—	`conf`	Efficient SR-Latch PUF. ARC Bilal Habib, Jens-Peter Kaps, Kris Gaj
2015	J	`jnl`	GMU Hardware API for Authenticated Ciphers. IACR Cryptol. ePrint Arch. Ekawat Homsirikamol, William Diehl, Ahmed Ferozpuri, Farnoud Farahmand, Malik Umar Sharif, Kris Gaj
2015	—	`conf`	Hardware Benchmarking of Cryptographic Algorithms Using High-Level Synthesis Tools: The SHA-3 Contest Case Study. ARC Ekawat Homsirikamol, Kris Gaj
2015	B	`conf`	Using Facebook for Image Steganography. ARES Jason Hiney, Tejas Dakve, Krzysztof Szczypiorski, Kris Gaj
2015	J	`jnl`	Using Facebook for Image Steganography. CoRR Jason Hiney, Tejas Dakve, Krzysztof Szczypiorski, Kris Gaj
2014	B	`conf`	A novel modular adder for one thousand bits and more using fast carry chains of modern FPGAs. FPL Marcin Rogawski, Ekawat Homsirikamol, Kris Gaj
2014	—	`conf`	Can high-level synthesis compete against a hand-written code in the cryptographic domain? A case study. ReConFig Ekawat Homsirikamol, Kris Gaj
2014	A	`conf`	ICEPOLE: High-Speed, Hardware-Oriented Authenticated Encryption. CHES Pawel Morawiecki, Kris Gaj, Ekawat Homsirikamol, Krystian Matusiewicz, Josef Pieprzyk, Marcin Rogawski, Marian Srebrny, Marcin Wójcik
2014	J	`jnl`	ICEPOLE: High-speed, Hardware-oriented Authenticated Encryption. IACR Cryptol. ePrint Arch. Pawel Morawiecki, Kris Gaj, Ekawat Homsirikamol, Krystian Matusiewicz, Josef Pieprzyk, Marcin Rogawski, Marian Srebrny, Marcin Wójcik
2013	J	`jnl`	A high-speed unified hardware architecture for 128 and 256-bit security levels of AES and the SHA-3 candidate Grøstl. Microprocess. Microsystems Marcin Rogawski, Kris Gaj, Ekawat Homsirikamol
2013	C	`conf`	FPGA PUF Based on Programmable LUT Delays. DSD Bilal Habib, Kris Gaj, Jens-Peter Kaps
2012	C	`conf`	A High-Speed Unified Hardware Architecture for AES and the SHA-3 Candidate Grøstl. DSD Marcin Rogawski, Kris Gaj
2012	Misc	`conf`	A Novel Permutation-Based Hash Mode of Operation FP and the Hash Function SAMOSA. INDOCRYPT Souradyuti Paul, Ekawat Homsirikamol, Kris Gaj
2012	J	`jnl`	A Novel Permutation-based Hash Mode of Operation FP and the Hash Function SAMOSA. IACR Cryptol. ePrint Arch. Souradyuti Paul, Ekawat Homsirikamol, Kris Gaj
2012	J	`jnl`	Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs. IACR Cryptol. ePrint Arch. Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski, Rabia Shahid, Malik Umar Sharif
2012	—	`conf`	Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules. FPT Benjamin Y. Brewster, Ekawat Homsirikamol, Rajesh Velegalati, Kris Gaj
2012	J	`jnl`	Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10). Int. J. Reconfigurable Comput. Claudia Feregrino, Miguel Arias, Kris Gaj, Viktor K. Prasanna, Marco D. Santambrogio, Ron Sass
2011	C	`conf`	A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. DSD Xin Xin, Jens-Peter Kaps, Kris Gaj
2011	C	`conf`	Cryptographic Contests: Toward Fair and Comprehensive Benchmarking of Cryptographic Algorithms in Hardware (Abstract). DSD Kris Gaj
2011	J	`jnl`	Groestl Tweaks and their Effect on FPGA Results. IACR Cryptol. ePrint Arch. Marcin Rogawski, Kris Gaj
2011	J	`jnl`	Hardware architectures for algebra, cryptology, and number theory. Integr. Kris Gaj, Rainer Steinwandt
2011	J	`jnl`	New Hardware Architectures for Montgomery Modular Multiplication Algorithm. IEEE Trans. Computers Miaoqing Huang, Kris Gaj, Tarek A. El-Ghazawi
2011	A	`conf`	Throughput vs. Area Trade-offs in High-Speed Architectures of Five Round 3 SHA-3 Candidates Implemented Using Xilinx and Altera FPGAs. CHES Ekawat Homsirikamol, Marcin Rogawski, Kris Gaj
2011	—	`conf`	Use of embedded FPGA resources in implementations of 14 round 2 SHA-3 candidates. FPT Rabia Shahid, Malik Umar Sharif, Marcin Rogawski, Kris Gaj
2010	B	`conf`	ATHENa - Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware Using FPGAs. FPL Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol, Benjamin Y. Brewster
2010	J	`jnl`	Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve. IEEE Trans. Computers Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi, Marcin Rogawski
2010	J	`jnl`	Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs. IACR Cryptol. ePrint Arch. Ekawat Homsirikamol, Marcin Rogawski, Kris Gaj
2010	A	`conf`	Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs. CHES Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski
2009	A	`ed.`	Cryptographic Hardware and Embedded Systems - CHES 2009, 11th International Workshop, Lausanne, Switzerland, September 6-9, 2009, Proceedings CHES Christophe Clavier, Kris Gaj
2009	—	`ch.`	FPGA and ASIC Implementations of AES. Cryptographic Engineering Kris Gaj, Pawel Chodowiec
2009	J	`jnl`	Reconfigurable Computing Approach for Tate Pairing Cryptosystems over Binary Fields. IEEE Trans. Computers Chang Shu, Soonhak Kwon, Kris Gaj
2008	—	`conf`	An Optimized Hardware Architecture for the Montgomery Multiplication Algorithm. Public Key Cryptography Miaoqing Huang, Kris Gaj, Soonhak Kwon, Tarek A. El-Ghazawi
2008	J	`jnl`	FPGA accelerated multipliers over binary composite fields constructed via low hamming weight irreducible polynomials. IET Comput. Digit. Tech. Chang Shu, Soonhak Kwon, Kris Gaj
2008	—	`conf`	Memory security management for reconfigurable embedded systems. FPT Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Russell Tessier, Deepak Unnikrishnan, Kris Gaj
2008	J	`jnl`	Portable library development for reconfigurable computing systems: A case study. Parallel Comput. Proshanta Saha, Esam El-Araby, Miaoqing Huang, Mohamed Taher, Sergio López-Buedo, Tarek A. El-Ghazawi, Chang Shu, Kris Gaj, Alan Michalski, Duncan A. Buell
2008	J	`jnl`	The Promise of High-Performance Reconfigurable Computing. Computer Tarek A. El-Ghazawi, Esam El-Araby, Miaoqing Huang, Kris Gaj, Volodymyr V. Kindratenko, Duncan A. Buell
2007	J	`jnl`	An Optimized Hardware Architecture of Montgomery Multiplication Algorithm. IACR Cryptol. ePrint Arch. Miaoqing Huang, Kris Gaj, Soonhak Kwon, Tarek A. El-Ghazawi
2007	J	`jnl`	Guest Editors' Introduction: High-Performance Reconfigurable Computing. Computer Duncan A. Buell, Tarek A. El-Ghazawi, Kris Gaj, Volodymyr V. Kindratenko
2006	J	`jnl`	FPGA Accelerated Tate Pairing Based Cryptosystems over Binary Fields. IACR Cryptol. ePrint Arch. Chang Shu, Soonhak Kwon, Kris Gaj
2006	—	`conf`	FPGA accelerated tate pairing based cryptosystems over binary fields. FPT Chang Shu, Soonhak Kwon, Kris Gaj
2006	—	`conf`	Face Recognition CAPTCHAs. AICT/ICIW Deapesh Misra, Kris Gaj
2006	A	`conf`	Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware. CHES Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi
2006	A	`conf`	M03 - Reconfigurable supercomputing. SC Tarek A. El-Ghazawi, Duncan A. Buell, Volodymyr V. Kindratenko, Kris Gaj
2006	J	`jnl`	System-level parallelism and concurrency maximisation in reconfigurable computing applications. Int. J. Embed. Syst. Esam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. El-Ghazawi, David Caliga, Nikitas A. Alexandridis
2005	—	`conf`	A System-Level Design Methodology for Reconfigurable Computing Applications. FPT Esam El-Araby, Tarek A. El-Ghazawi, Kris Gaj
2005	—	`conf`	Analysis of Attacks and Defense Mechanisms for QoS Signaling Protocols in MANETs. Wireless Information Systems Charikleia Zouridaki, Marek Hejmo, Brian L. Mark, Roshan K. Thomas, Kris Gaj
2005	B	`conf`	High-Throughput Reconfigurable Computing: A Design Study of an IDEA Encryption Cryptosystem on the SRC-6e Reconfigurable Computer. FPL Allen Michalski, Kris Gaj, Duncan A. Buell
2005	A	`conf`	Image processing library for reconfigurable computers (abstract only). FPGA Mohamed Taher, Esam El-Araby, Tarek A. El-Ghazawi, Kris Gaj
2005	—	`conf`	Implementation of EAX Mode of Operation for FPGA Bitstream Encryption and Authentication. FPT Milind M. Parelkar, Kris Gaj
2005	—	`conf`	Low Latency Elliptic Curve Cryptography Accelerators for NIST Curves Over Binary Fields. FPT Chang Shu, Kris Gaj, Tarek A. El-Ghazawi
2005	A	`conf`	Reconfigurable computers: an empirical analysis (abstract only). FPGA Tarek A. El-Ghazawi, Kris Gaj, Nikitas A. Alexandridis, Allen Michalski, Osman Devrim Fidanci, Mohamed Taher, Esam El-Araby, Esmail Chitalwala, Proshanta Saha
2005	—	`conf`	Secure Partial Reconfiguration of FPGAs. FPT Amir Sheikh Zeineddini, Kris Gaj
2004	B	`conf`	A 1 Gbit/s Partially Unrolled Architecture of Hash Functions SHA-1 and SHA-512. CT-RSA Roar Lien, Tim Grembowski, Kris Gaj
2004	J	`jnl`	A performance study of job management systems. Concurr. Pract. Exp. Tarek A. El-Ghazawi, Kris Gaj, Nikitas A. Alexandridis, Frederic Vroman, Nguyen Nguyen, Jacek R. Radzikowski, Preeyapong Samipagdi, Suboh A. Suboh
2004	A	`conf`	An embedded true random number generator for FPGAs. FPGA Paul Kohlbrenner, Kris Gaj
2004	—	`conf`	Distributed CA-based PKI for Mobile Ad Hoc Networks Using Elliptic Curve Cryptography. EuroPKI Charikleia Zouridaki, Brian L. Mark, Kris Gaj, Roshan K. Thomas
2004	—	`conf`	Effective system and performance benchmarking for reconfigurable computers. FPT Esmail Chitalwala, Tarek A. El-Ghazawi, Kris Gaj, Nikitas A. Alexandridis, Daniel S. Poznanovic
2004	A	`conf`	Efficient Linear Array for Multiplication in GF(2 CHES Soonhak Kwon, Kris Gaj, Chang Hoon Kim, Chun Pyo Hong
2004	B	`conf`	Implementation of Elliptic Curve Cryptosystems over GF(2 FPL Sashisu Bajracharya, Chang Shu, Kris Gaj, Tarek A. El-Ghazawi
2004	A	`conf`	Implementation of elliptic curve cryptosystems over GF(2 FPGA Sashisu Bajracharya, Chang Shu, Kris Gaj, Tarek A. El-Ghazawi
2004	—	`conf`	Reconfigurable hardware implementation of mesh routing in number field sieve factorization. FPT Sashisu Bajracharya, Deapesh Misra, Kris Gaj, Tarek A. El-Ghazawi
2004	—	`conf`	Securing Multicast Groups in Ad Hoc Networks. AWCC Hartono Kurnio, Huaxiong Wang, Josef Pieprzyk, Kris Gaj
2004	A	`conf`	System-Level Parallelism and Throughput Optimization in Designing Reconfigurable Computing Applications. IPDPS Esam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. El-Ghazawi, David Caliga, Nikitas A. Alexandridis
2004	—	`conf`	Wavelet spectral dimension reduction of hyperspectral imagery on a reconfigurable computer. FPT Esam El-Araby, Tarek A. El-Ghazawi, Jacqueline Le Moigne, Kris Gaj
2003	B	`conf`	An Implementation Comparison of an IDEA Encryption Cryptosystem on Two General-Purpose Reconfigurable Computers. FPL Allen Michalski, Kris Gaj, Tarek A. El-Ghazawi
2003	A	`conf`	Effective Utilization and Reconfiguration of Distributed Hardware Resources Using Job Management Systems. IPDPS Kris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandridis, Jacek R. Radzikowski, Mohamed Taher, Frederic Vroman
2003	—	`conf`	Exploiting system-level parallelism in the application development on a reconfigurable computer. FPT Esam El-Araby, Mohamed Taher, Kris Gaj, Tarek A. El-Ghazawi, David Caliga, Nikitas A. Alexandridis
2003	A*	`conf`	Facts and Myths of Enigma: Breaking Stereotypes. EUROCRYPT Kris Gaj, Arkadiusz Orlowski
2003	B	`conf`	IPsec-Protected Transport of HDTV over IP. FPL Peter Bellows, Jaroslav Flidr, Ladan Gharai, Colin Perkins, Pawel Chodowiec, Kris Gaj
2003	—	`conf`	Implementation of Elliptic Curve Cryptosystems on a reconfigurable computer. FPT Nghi Nguyen, Kris Gaj, David Caliga, Tarek A. El-Ghazawi
2003	A	`conf`	Performance and Overhead in a Hybrid Reconfigurable Computer. IPDPS Osman Devrim Fidanci, Daniel S. Poznanovic, Kris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandridis
2003	A	`conf`	Very Compact FPGA Implementation of the AES Algorithm. CHES Pawel Chodowiec, Kris Gaj
2002	C	`conf`	Comparative Analysis of the Hardware Implementations of Hash Functions SHA-1 and SHA-512. ISC Tim Grembowski, Roar Lien, Kris Gaj, Nghi Nguyen, Peter Bellows, Jaroslav Flidr, Tom Lehman, Brian Schott
2002	A	`conf`	Performance Evaluation of Selected Job Management Systems. IPDPS Kris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandridis, Frederic Vroman, Nguyen Nguyen, Jacek R. Radzikowski, Preeyapong Samipagdi, Suboh A. Suboh
2001	C	`conf`	Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board. ISC Pawel Chodowiec, Kris Gaj, Peter Bellows, Brian Schott
2001	B	`conf`	Fast Implementation and Fair Comparison of the Final Candidates for Advanced Encryption Standard Using Field Programmable Gate Arrays. CT-RSA Kris Gaj, Pawel Chodowiec
2001	A	`conf`	Fast implementations of secret-key block ciphers using mixed inner- and outer-round pipelining. FPGA Pawel Chodowiec, Po Khuon, Kris Gaj
2000	—	`conf`	Comparison of the Hardware Performance of the AES Candidates Using Reconfigurable Hardware. AES Candidate Conference Kris Gaj, Pawel Chodowiec
1997	J	`jnl`	Timing of Multi-Gigahertz Rapid Single Flux Quantum Digital Circuits. J. VLSI Signal Process. Kris Gaj, Eby G. Friedman, Marc J. Feldman