Kostas Masselos

48 papers A 3B 4C 3Journal 17Unranked 21
YearRankTypeTitle / Venue / Authors
2014 — conf
Hardware architecture for Fast 2D distance transformations.
ICDIP
Vasiliki Giannakopoulou, Kostas Masselos
2013 J jnl
Compiling Scilab to high performance embedded multicore systems.
Microprocess. Microsystems
Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Olivier Sentieys, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, Thomas Perschke
2013 — conf
Hardware design space exploration using HercuLeS HLS.
Panhellenic Conference on Informatics
Nikolaos Kavvadias, Kostas Masselos
2013 B conf
The HercuLeS high-level synthesis environment.
FPL
Nikolaos Kavvadias, Kostas Masselos
2012 — conf
A flexible approach for compiling scilab to reconfigurable multi-core embedded systems.
ReCoSoC
Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Ménard, Olivier Sentieys, Diana Göhringer, Thomas Perschke
2012 — conf
Automated Synthesis of FSMD-Based Accelerators for Hardware Compilation.
ASAP
Nikolaos Kavvadias, Kostas Masselos
2012 — conf
Design of fixed-point rounding operators for the VHDL-2008 standard.
DASIP
Nikolaos Kavvadias, Kostas Masselos
2012 C conf
From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach.
DSD
Jürgen Becker, Timo Stripf, Oliver Oey, Michael Hübner, Steven Derrien, Daniel Ménard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Göhringer
2012 — conf
From Scilab to multicore embedded systems: Algorithms and methodologies.
ICSAMOS
George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Göhringer, Steven Derrien, Daniel Ménard, Olivier Sentieys, Michael Hübner, Timo Stripf, Oliver Oey, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas
2010 — conf
XMSIM: EXtensible Memory SIMulator for Early Memory Hierarchy Evaluation.
ISVLSI
Theodoros Lioris, Grigoris Dimitroulakos, Kostas Masselos
2010 — conf
XMSIM: Extensible Memory Simulator for Early Memory Hierarchy Evaluation.
ISVLSI (Selected papers)
Theodoros Lioris, Grigoris Dimitroulakos, Kostas Masselos
2008 J jnl
Implementation and Comparison of the 5/3 Lifting 2D Discrete Wavelet Transform Computation Schedules on FPGAs.
J. Signal Process. Syst.
Maria E. Angelopoulou, Kostas Masselos, Peter Y. K. Cheung, Yiannis Andreopoulos
2008 J jnl
Outer Loop Pipelining for Application Specific Datapaths in FPGAs.
IEEE Trans. Very Large Scale Integr. Syst.
Kieron Turkington, Turkington A. Constantinides, Kostas Masselos, Peter Y. K. Cheung
2006 C conf
Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP.
ISCAS
Kostas Masselos, Yiannis Andreopoulos, Thanos Stouraitis
2004 — conf
A reusable IP FFT core for DSP applications.
ISCAS (3)
Evaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis
2004 J jnl
Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors.
J. VLSI Signal Process.
Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
2004 — conf
Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform.
PATMOS
Kostas Masselos, Spyros Blionas, Jean-Yves Mignolet, A. Foster, Dimitrios Soudris, Spiridon Nikolaidis
2004 B conf
System-Level Modeling of Dynamically Reconfigurable Co-processors.
FPL
Yang Qu, Kari Tiensyrjä, Kostas Masselos
2004 C conf
SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip.
FDL
Kari Tiensyrjä, Miroslav Cupák, Kostas Masselos, Marko Pettissalo
2003 J jnl
High-Level Cache Modeling for 2-D Discrete Wavelet Transform Implementations.
J. VLSI Signal Process.
Yiannis Andreopoulos, Peter Schelkens, Gauthier Lafruit, Kostas Masselos, Jan Cornelis
2003 — conf
Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms.
PATMOS
Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas
2003 J jnl
Power efficient data path synthesis of sum-of-products computations.
IEEE Trans. Very Large Scale Integr. Syst.
Kostas Masselos, Panagiotis Merakos, S. Theoharis, Thanos Stouraitis, Constantinos E. Goutis
2003 J jnl
Realization of wireless multimedia communication systems on reconfigurable platforms.
J. Syst. Archit.
Kostas Masselos, Antti Pelkonen, Miroslav Cupák, Spyros Blionas
2003 A conf
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC.
IPDPS
Antti Pelkonen, Kostas Masselos, Miroslav Cupák
2003 J jnl
Systematic Application of Data Transfer and Storage Optimizing Code Transformations for Power Consumption and Execution Time Reduction in ACROPOLIS: A Pre-Compiler for Multimedia Applications.
Des. Autom. Embed. Syst.
Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
2002 B conf
A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip.
FPL
Spyros Blionas, Kostas Masselos, Chrissavgi Dre, Christos Drosos, F. Z. Ieromnimon, T. Pagonis, Aristodemos Pneymatikakis, Anna Tatsaki, T. Trimis, A. Vontzalidis, Dimitris Metafas
2002 J jnl
A systematic methodology for the application of data transfer and storage optimizing code transformations for power consumption and execution time reduction in realizations of multimedia algorithms on programmable processors.
IEEE Trans. Very Large Scale Integr. Syst.
Kostas Masselos, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
2002 B conf
Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations.
FPL
George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis
2002 — conf
Cache misses and energy-dissipation results for JPEG-2000 filtering.
DSP
Yiannis Andreopoulos, Kostas Masselos, Peter Schelkens, Gauthier Lafruit, Jan Cornelis
2002 — conf
Power Efficient Vector Quantization Design Using Pixel Truncation.
PATMOS
Kostas Masselos, Panagiotis Merakos, Constantinos E. Goutis
2001 — conf
Memory hierarchy layer assignment for data re-use exploitation in multimedia algorithms realized on predefined processor architectures.
ICECS
Kostas Masselos, Francky Catthoor, A. Kakarudas, Costas E. Goutis, Hugo De Man
2000 J jnl
A Specification Refinement Methodology for Power Efficient Partitioning of Data-Dominated Algorithms Within Performance Constraints.
J. VLSI Signal Process.
Kostas Masselos, Koen Danckaert, Francky Catthoor, Nikolaos D. Zervas, Constantinos E. Goutis, Hugo De Man
2000 — conf
Development of a power efficient image coding algorithm based on integer wavelet transform.
ICECS
Kostas Masselos, Yorgos A. Karayiannis, I. Andreopoulos, Thanos Stouraitis
2000 J jnl
Low power architectures for digital signal processing.
J. Syst. Archit.
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
2000 A conf
Low power synthesis of sum-of-products computation (poster session).
ISLPED
Kostas Masselos, S. Theoharis, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
1999 A conf
A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints.
ISLPED
Kostas Masselos, Koen Danckaert, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
1999 J jnl
Computation Reordering: A Novel Transformation for Low Power DSP Synthesis.
VLSI Design
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
1999 — conf
Low power synthesis of sum-of-product computation in DSP algorithms.
ISCAS (6)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
1999 J jnl
Novel techniques for bus power consumption reduction in realizations of sum-of-product computation.
IEEE Trans. Very Large Scale Integr. Syst.
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
1999 — conf
Power exploration of multimedia applications realized on embedded cores.
ISCAS (4)
Nikolaos D. Zervas, Kostas Masselos, Odysseas G. Koufopavlou, Constantinos E. Goutis
1999 J jnl
Strategy for power efficient combined task and data parallelism exploration illustrated on a QSDPCM video codec.
J. Syst. Archit.
Koen Danckaert, Kostas Masselos, Francky Catthoor, Hugo De Man
1999 J jnl
Strategy for power-efficient design of parallel systems.
IEEE Trans. Very Large Scale Integr. Syst.
Koen Danckaert, Kostas Masselos, Francky Catthoor, Hugo De Man, Constantinos E. Goutis
1999 — conf
System-level power optimizing data-flow transformations for multimedia applications realized on programmable multimedia processors.
ICECS
Kostas Masselos, Francky Catthoor, Costas E. Goutis, H. DeMan
1998 J jnl
A novel algorithm for low-power image and video coding.
IEEE Trans. Circuits Syst. Video Technol.
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
1998 — conf
Low-power implementation of discrete wavelet transform.
EUSIPCO
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
1998 J jnl
Trade-Off Analysis of a Low-Power Image Coding Algorithm.
J. VLSI Signal Process.
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
1996 — conf
A parallel image compression scheme based on fractal coding and vector quantization.
ICECS
Kostas Masselos, Konstantina Karagianni, Yorgos A. Karayiannis, Thanos Stouraitis
1996 — conf
Low-power image decoding using fractals.
ICECS
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Costas E. Goutis