Kostas Doris

21 papers C 4Journal 6Unranked 11
YearRankTypeTitle / Venue / Authors
2024 — conf
32.6 A 76-to-81GHz Direct-Digital 7b 14GS/s Double-Balanced I/Q Mixing-DAC Radar-Waveform Synthesizer.
ISSCC
Marios Neofytou, Kostas Doris, Marcello Ganzerli, Maarten Lont, Georgi I. Radulov
2021 C conf
A Novel 2-Dimensional Correction Method for mm-Wave Cartesian I/Q Modulators.
ISCAS
Marios Neofytou, Pavlos Athanasiadis, Marcello Ganzerli, Maarten Lont, Georgi I. Radulov, Kostas Doris
2021 C conf
Time Interleaved ADC Mismatch Error Correction Technique in I/Q Digital Beamforming Receivers.
ISCAS
Pavlos Athanasiadis, Marios Neofytou, Marcello Ganzerli, Georgi I. Radulov, Kostas Doris
2020 — conf
A novel analysis of the beam squinting in wideband phased array digital I/Q transmitters.
ECCTD
Veselin Manev, Marios Neofytou, Georgi I. Radulov, Kostas Doris
2018 — conf
EE4: Figures-of-merit on trial.
ISSCC
Kostas Doris, Stefano Stanzione, Paul Ferguson
2018 — conf
EE5: Lessons learned - Great circuits that didn't work - (Oops, if only i had known!).
ISSCC
Phillip J. Restle, Kostas Doris, Vivek De, Paul Ferguson
2018 — conf
Session 22 overview: Gigahertz data converters: Data converter subcommittee.
ISSCC
Kostas Doris, Jan Westra, Un-Ku Moon
2017 J jnl
A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear Shifting.
IEEE Trans. Circuits Syst. II Express Briefs
Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann
2017 — conf
F6: Pushing the performance limit in data converters organizers: Venkatesh Srinivasan, Texas Instruments, Dallas, TX.
ISSCC
Kostas Doris, David Robertson, Seung-Tak Ryu, Seng-Pan U
2016 — conf
F2: Data-converter calibration and dynamic-matching techniques.
ISSCC
Kostas Doris, Alyosha C. Molnar, Xicheng Jiang, Seung-Tak Ryu
2016 — conf
Session 27 overview: Hybrid and nyquist data converters.
ISSCC
Stéphane Le Tual, Kostas Doris
2015 — conf
15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS.
ISSCC
Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann
2015 J jnl
A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS.
IEEE J. Solid State Circuits
Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann
2013 — conf
An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signals.
ESSCIRC
Yu Lin, Kostas Doris, Erwin Janssen, Athon Zanikopoulos, Alessandro Murroni, Gerard van der Weide, Hans Hegt, Arthur H. M. van Roermund
2013 — conf
An 11b 3.6GS/s time-interleaved SAR ADC in 65nm CMOS.
ISSCC
Erwin Janssen, Kostas Doris, Athon Zanikopoulos, Alessandro Murroni, Gerard van der Weide, Yu Lin, Ludo Alvado, Frederic Darthenay, Yannick Fregeais
2012 C conf
A dynamic latched comparator for low supply voltages down to 0.45 V in 65-nm CMOS.
ISCAS
Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund
2012 J jnl
An 11b Pipeline ADC With Parallel-Sampling Technique for Converting Multi-Carrier Signals.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund
2011 J jnl
A 14 bit 200 MS/s DAC With SFDR > 78 dBc, IM3 < - 83 dBc and NSD < - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping.
IEEE J. Solid State Circuits
Yongjian Tang, Joost Briaire, Kostas Doris, Robert H. M. van Veldhoven, Pieter C. W. van Beek, Hans Hegt, Arthur H. M. van Roermund
2011 J jnl
A 480 mW 2.6 GS/s 10b Time-Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOS.
IEEE J. Solid State Circuits
Kostas Doris, Erwin Janssen, Claudio Nani, Athon Zanikopoulos, Gerard van der Weide
2011 C conf
An 11b pipeline ADC with dual sampling technique for converting multi-carrier signals.
ISCAS
Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund
2008 J jnl
A broadband RF 65 nm CMOS front-end for cable TV reception.
Microelectron. J.
Marco Pifferi, Fabio Ducati, Hans Brekelmans, Lorenzo Tripodi, Kostas Doris, Mattia Borgarino