Kosmas Alexandridis

21 papers A 2Journal 15Unranked 4
YearRankTypeTitle / Venue / Authors
2026 J jnl
H-FA: A Hybrid Floating-Point and Logarithmic Approach to Hardware Accelerated FlashAttention.
IEEE Trans. Circuits Syst. Artif. Intell.
Kosmas Alexandridis, Giorgos Dimitrakopoulos
2026 J jnl
Vectorized FlashAttention with low-cost exponential computation in RISC-V vector processors.
J. Supercomput.
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 — conf
Custom Algorithm-based Fault Tolerance for Attention Layers in Transformers.
SOCC
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 J jnl
Custom Algorithm-based Fault Tolerance for Attention Layers in Transformers.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 A conf
FLASH-D: FlashAttention with Hidden Softmax Division.
ISLPED
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 J jnl
FLASH-D: FlashAttention with Hidden Softmax Division.
CoRR
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 J jnl
H-FA: A Hybrid Floating-Point and Logarithmic Approach to Hardware Accelerated FlashAttention.
CoRR
Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 — conf
Low-Cost FlashAttention with Fused Exponential and Multiplication Hardware Operators.
ISVLSI
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Low-Cost FlashAttention with Fused Exponential and Multiplication Hardware Operators.
CoRR
Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Online Alignment and Addition in Multiterm Floating-Point Adders.
IEEE Trans. Very Large Scale Integr. Syst.
Kosmas Alexandridis, Giorgos Dimitrakopoulos
2025 J jnl
Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors.
IEEE Trans. Computers
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 — conf
Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs.
CF
Vasileios Titopoulos, George Alexakis, Kosmas Alexandridis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs.
CoRR
Vasileios Titopoulos, George Alexakis, Kosmas Alexandridis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2025 J jnl
Vectorized FlashAttention with Low-cost Exponential Computation in RISC-V Vector Processors.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2024 J jnl
Floating-Point Multiply-Add with Approximate Normalization for Low-Cost Matrix Engines.
CoRR
Kosmas Alexandridis, Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos
2024 A conf
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications.
DATE
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
2024 J jnl
Online Alignment and Addition in Multi-Term Floating-Point Adders.
CoRR
Kosmas Alexandridis, Giorgos Dimitrakopoulos
2024 — conf
Reusing Softmax Hardware Unit for GELU Computation in Transformers.
AICAS
Christodoulos Peltekis, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2024 J jnl
Reusing Softmax Hardware Unit for GELU Computation in Transformers.
CoRR
Christodoulos Peltekis, Kosmas Alexandridis, Giorgos Dimitrakopoulos
2023 J jnl
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications.
CoRR
Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos