Konstantinos Tatas

44 papers A 4B 4C 2Misc 1Journal 11Unranked 22

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Artemis: IoT-Based Shooting Range Management System. MOCAST Konstantinos Tatas, Christos Markides, Victoras Kassianides, Nicos Hadjisofokli
2024	—	`conf`	PDU: A Pill Dispenser Unit for an IoT System for Monitoring and Controlling the Pharmaceutical Treatment for Patients With Psychological Mental Conditions. IC3INA Marios Savvides, Costas Kyriacou, Victoras Kassianides, Christos Markides, Konstantinos Tatas
2024	—	`conf`	WIDE: Worksheet Integrated Development Environment for Arduino-Based Embedded System Design. MOCAST N. Ioannou, Konstantinos Tatas, A. Constantinides, Costas Kyriacou
2023	—	`conf`	A Low-Cost Real-Time Cyber Physical System for Overcoming Excess Braking Issues In Race Cars. MOCAST V. Samaras, Konstantinos Tatas, Antonios Lontos
2021	—	`conf`	Towards an Analytical Model of Latency in Deflection Routing: A Stochastic Process Approach for Bufferless NoCs. MOCAST Konstantinos Tatas
2021	—	`conf`	iPONICS: IoT Monitoring and Control for Hydroponics. MOCAST Konstantinos Tatas, Ahmad Al-Zoubi, A. Antoniou, D. Zolotareva
2020	J	`jnl`	Fuzzy classification of OpenCL programs targeting heterogeneous systems. J. Intell. Fuzzy Syst. Ahmad Al-Zoubi, Konstantinos Tatas, Costas Kyriacou
2018	—	`conf`	Design space exploration of the KNN imputation on FPGA. MOCAST Ahmad Al-Zoubi, Konstantinos Tatas, Costas Kyriacou
2018	—	`conf`	High-performance 3D NoC bufferless router with approximate priority comparison. MOCAST Konstantinos Tatas
2018	C	`conf`	Towards Dynamic Multi-task Schedulling of OpenCL Programs on Emerging CPU-GPU-FPGA Heterogeneous Platforms: A Fuzzy Logic Approach. CloudCom Ahmad Al-Zoubi, Konstantinos Tatas, Costas Kyriacou
2017	—	`conf`	3DBUFFBLESS: A novel buffered-bufferless hybrid router for 3D Networks-on-Chip. PATMOS Konstantinos Tatas, Savvas Sava, Costas Kyriacou
2017	J	`jnl`	Hardware implementation of dynamic fuzzy logic based routing in Network-on-Chip. Microprocess. Microsystems Konstantinos Tatas, Chrysostomos Chrysostomou
2016	C	`conf`	Adaptive Networks-on-Chip Routing with Fuzzy Logic Control. DSD Konstantinos Tatas, Chrysostomos Chrysostomou
2014	—	`conf`	Low-cost fault-tolerant routing for regular topology NoCs. ICECS Konstantinos Tatas, S. Sawa, Costas Kyriacou
2013	J	`jnl`	A Novel Prototyping and Evaluation Framework for NoC-Based MPSoC. Int. J. Adapt. Resilient Auton. Syst. Konstantinos Tatas, Kostas Siozios, Alexandros Bartzas, Costas Kyriacou, Dimitrios Soudris
2012	—	`conf`	A Dynamic Fuzzy Logic Based Routing Scheme for Bufferless NoCs. CSE Chrysostomos Chrysostomou, Konstantinos Tatas, A. R. Runcan
2012	—	`conf`	A novel fuzzy logic based bufferless routing algorithm for low-power NoCs. BCFIC Konstantinos Tatas, Chrysostomos Chrysostomou
2008	J	`jnl`	Rapid Prototyping of the Data-Driven Chip-Multiprocessor (d Parallel Process. Lett. Konstantinos Tatas, Costas Kyriacou, Paraskevas Evripidou, Pedro Trancoso, Stephan Wong
2007	J	`jnl`	Architecture design of a coarse-grain reconfigurable multiply-accumulate unit for data-intensive applications. Integr. Konstantinos Tatas, George Koutroumpezis, Dimitrios Soudris, Adonios Thanailakis
2006	A	`conf`	A novel methodology for designing high-performance and low-energy FPGA routing architecture. FPGA Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis
2006	J	`jnl`	Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors. J. VLSI Signal Process. Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
2006	A	`conf`	Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications. IPDPS Kostas Siozios, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis
2005	J	`jnl`	A Novel Division Algorithm and Architectures for Parallel and Sequential Processing. J. Circuits Syst. Comput. Konstantinos Tatas, Dimitrios Soudris, D. Siomos, Adonios Thanailakis
2005	J	`jnl`	A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications. IEICE Trans. Inf. Syst. Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Dimitrios Soudris, Antonios Thanailakis, Spiridon Nikolaidis, Stilianos Siskos
2005	J	`jnl`	A complete platform and toolset for system implementation on fine-grain reconfigurable hardware. Microprocess. Microsystems Vasilios Kalenteridis, Haroula Pournara, Kostas Siozios, Konstantinos Tatas, Nikolaos Vassiliadis, Ilias Pappas, George Koutroumpezis, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris
2005	—	`conf`	AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow. ASP-DAC Dimitrios Soudris, Spiridon Nikolaidis, Stilianos Siskos, Konstantinos Tatas, Kostas Siozios, George Koutroumpezis, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Adonios Thanailakis
2005	B	`conf`	An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform. FPL Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, D. J. Soudris, Adonios Thanailakis
2005	A	`conf`	DAGGER: A Novel Generic Methodology for FPGA Bitstream Generation and Its Software Tool Implementation. IPDPS Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis
2005	J	`jnl`	Memory power optimization of hardware implementations of multimedia applications onto FPGA platforms. J. Embed. Comput. Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis
2004	B	`conf`	A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development. FPL Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis
2004	—	`conf`	A reusable IP FFT core for DSP applications. ISCAS (3) Evaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis
2004	A	`conf`	An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development. IPDPS Vasilios Kalenteridis, Haroula Pournara, Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, Ilias Pappas, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris, Adonios Thanailakis
2003	—	`conf`	A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems. ISCAS (5) Dimitrios Soudris, K. Sgouropoulos, Konstantinos Tatas, Vasilis F. Pavlidis, Adonios Thanailakis
2003	J	`jnl`	Data memory power optimization and performance exploration of embedded systems for implementing motion estimation algorithms. Real Time Imaging Konstantinos Tatas, Minas Dasygenis, Nikolas Kroupis, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
2003	—	`conf`	FPGA Architecture Design and Toolset for Logic Implementation. PATMOS Konstantinos Tatas, Kostas Siozios, Nikolaos Vassiliadis, D. J. Soudris, Spiridon Nikolaidis, Stilianos Siskos, Adonios Thanailakis
2003	—	`conf`	Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms. PATMOS Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas
2003	B	`conf`	Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms. FPL Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis
2002	—	`conf`	A full adder based methodology for scaling operation in residue number system. ICECS Dimitrios Soudris, Minas Dasygenis, K. Mitroglou, Konstantinos Tatas, Adonios Thanailakis
2002	—	`conf`	A novel division algorithm for parallel and sequential processing. ICECS Konstantinos Tatas, D. J. Soudris, D. Siomos, Minas Dasygenis, Adonios Thanailakis
2002	B	`conf`	Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations. FPL George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis
2001	Misc	`conf`	Data and instruction memory exploration of embedded systems for multimedia applications. ICASSP Minas Dasygenis, Nikolas Kroupis, Antonios Argyriou, Konstantinos Tatas, Dimitrios Soudris, Nikolaos D. Zervas
2001	—	`conf`	Memory Hierarchy Optimization of Multimedia Applications on Programmable Embedded Cores 1. ISQED Konstantinos Tatas, Antonios Argyriou, Minas Dasygenis, Dimitrios Soudris, Nikolaos D. Zervas
2001	—	`conf`	Power, performance and area exploration of block matching algorithms mapped on programmable processors. ICIP (3) Nikolas Kroupis, Minas Dasygenis, Antonios Argyriou, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis, Nikolaos D. Zervas, Constantinos E. Goutis
2000	—	`conf`	Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications. PATMOS Dimitrios Soudris, Nikolaos D. Zervas, Antonios Argyriou, Minas Dasygenis, Konstantinos Tatas, Constantinos E. Goutis, Adonios Thanailakis