Konrad Lai

22 papers A* 7A 3B 1C 3Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2016 J jnl
RowHammer: Reliability Analysis and Security Implications.
CoRR
Yoongu Kim, Ross Daly, Jeremie S. Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu
2014 — conf
Author retrospective for bloom filtering cache misses for accurate data speculation and prefetching.
ICS 25th Anniversary
Jih-Kwon Peir, Shih-Chang Kevin Lai, Shih-Lien Lu, Jared Stark, Konrad Lai
2014 A* conf
Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors.
ISCA
Yoongu Kim, Ross Daly, Jeremie S. Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu
2014 A* conf
Improving in-memory database index performance with Intel
HPCA
Tomas Karnagel, Roman Dementiev, Ravi Rajwar, Konrad Lai, Thomas Legler, Benjamin Schlegel, Wolfgang Lehner
2013 A conf
Performance evaluation of Intel® transactional synchronization extensions for high-performance computing.
SC
Richard M. Yoo, Christopher J. Hughes, Konrad Lai, Ravi Rajwar
2006 J jnl
Scalable Load and Store Processing in Latency-Tolerant Processors.
IEEE Micro
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan, Konrad Lai
2005 — conf
A 10Mbit, 15GBytes/sec bandwidth 1T DRAM chip with planar MOS storage capacitor in an unmodified 150nm logic process for high-density on-chip memory applications.
ESSCIRC
Dinesh Somasekhar, Shih-Lien Lu, Bradley A. Bloechel, Greg Dermer, Konrad Lai, Sjeljar Borkar, Vivek De
2004 C conf
A Minimal Dual-Core Speculative Multi-Threading Architecture.
ICCD
Srikanth T. Srinivasan, Haitham Akkary, Tom Holman, Konrad Lai
2004 J jnl
A New Address-Free Memory Hierarchy Layer for Zero-Cycle Load.
J. Instr. Level Parallelism
Lu Peng, Jih-Kwon Peir, Konrad Lai
2004 A* conf
Prophet/Critic Hybrid Branch Prediction.
ISCA
Ayose Falcón, Jared Stark, Alex Ramírez, Konrad Lai, Mateo Valero
2004 A* conf
Signature Buffer: Bridging Performance Gap between Registers and Caches.
HPCA
Lu Peng, Jih-Kwon Peir, Konrad Lai
2003 J jnl
Address-free memory access based on program syntax correlation of loads and stores.
IEEE Trans. Very Large Scale Integr. Syst.
Lu Peng, Jih-Kwon Peir, Qianrong Ma, Konrad Lai
2003 B conf
Implementation of HW$im - A Real-Time Configurable Cache Simulator.
FPL
Shih-Lien Lu, Konrad Lai
2003 A conf
Recycling waste: exploiting wrong-path execution to improve branch prediction.
ICS
Haitham Akkary, Srikanth T. Srinivasan, Konrad Lai
2002 A conf
Bloom filtering cache misses for accurate data speculation and prefetching.
ICS
Jih-Kwon Peir, Shih-Chang Lai, Shih-Lien Lu, Jared Stark, Konrad Lai
2002 A* conf
Dynamic addressing memory arrays with physical locality.
MICRO
Steven Hsu, Shih-Lien Lu, Shih-Chang Lai, Ram Krishnamurthy, Konrad Lai
2001 J jnl
Coming challenges in microarchitecture and architecture.
Proc. IEEE
Ronny Ronen, Avi Mendelson, Konrad Lai, Shih-Lien Lu, Fred J. Pollack, John Paul Shen
2001 A* conf
Direct load: dependence-linked dataflow resolution of load address and cache coordinate.
MICRO
Byung-Kwon Chung, Jinsuo Zhang, Jih-Kwon Peir, Shih-Chang Lai, Konrad Lai
2001 C conf
Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores.
ICCD
Qianrong Ma, Jih-Kwon Peir, Lu Peng, Konrad Lai
1992 A* conf
Revisit the case for direct-mapped chaches: a case for two-way set-associative level-two caches.
ISCA
Wen-Hann Wang, Jim Quinlan, Konrad Lai
1990 — conf
A VLSI-intensive fault-tolerant computer architecture.
Compcon
Fred J. Pollack, Dave Johnson, Dave Carson, Ron Ebersole, Vittal Kini, Konrad Lai, Bernie Silvernail, Steve Stacey
1988 C conf
Microarchitecture of the 80960 high-integration processors.
ICCD
Glenn Hinton, Konrad Lai, Randy Steck