Kolin Paul - RankMe

141 papers A 3B 3C 19Misc 25Journal 41Unranked 50

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Optimizing DL Models for Deployment on Resource-Constrained Platforms. BIOSTEC (3) Priyanka Chauhan, Kolin Paul
2024	J	`jnl`	Demonstration of denial of charging attack on electric vehicle charging infrastructure and its consequences. Int. J. Crit. Infrastructure Prot. Kirti Gupta, Bijaya Ketan Panigrahi, Anupam Joshi, Kolin Paul
2024	C	`conf`	Detection of Coronary Artery Disease Using PCG Signals for Wearable Devices: LSTM-Based Approach. HealthCom Priyanka Chauhan, Kolin Paul
2024	Misc	`conf`	LLC Block Reuse Predictor Design using Deep Learning to Mitigate Soft Error in Multicore. VLSID Avishek Choudhury, Brototi Mondal, Kolin Paul, Biplab K. Sikdar
2024	Misc	`conf`	Long Short Term Memory (LSTM)-based Cuffless Continuous Blood Pressure Monitoring. VLSID Vijay Kumar, Goldy, Kolin Paul, Mahesh Chowdhary
2024	B	`conf`	MMTS: Multi-Modal Time Series Based Decision Support System for Ventilator Associated Pneumonia. IJCNN Nikki Tiwari, Kolin Paul, Shrawan Kumar Raut, Animesh Ray, Surabhi Vyas, Naveet Wig
2024	J	`jnl`	Medical Image Data Provenance for Medical Cyber-Physical System. CoRR Vijay Kumar, Kolin Paul
2024	J	`jnl`	NetraDeep: An Integrated Deep Learning and Image Processing System for Precise Detection of Hard Exudates. ACM Trans. Comput. Heal. Vatsal Agrawal, Vijay Kumar, Swati Sharma, Rohan Chawla, Kolin Paul
2023	—	`conf`	Compression of Large LSTM Networks for Inference on Space Constraint Systems. PReMI Suyash Saxena, Varun Singh Negi, Kolin Paul
2023	—	`conf`	Deep Learning Assisted Plus Disease Screening of Retinal Image of Infants. HEALTHINF Vijay Kumar, Vatsal Agrawal, Shorya Azad, Kolin Paul
2023	J	`jnl`	Deep Learning-assisted Retinopathy of Prematurity (ROP) Screening. ACM Trans. Comput. Heal. Vijay Kumar, Het Patel, Kolin Paul, Shorya Azad
2023	J	`jnl`	Deep-learning-based data-manipulation attack resilient supervisory backup protection of transmission lines. Neural Comput. Appl. Astha Chawla, Prakhar Agrawal, Bijaya Ketan Panigrahi, Kolin Paul
2023	J	`jnl`	Device Fingerprinting for Cyber-Physical Systems: A Survey. ACM Comput. Surv. Vijay Kumar, Kolin Paul
2023	J	`jnl`	Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictor. Microprocess. Microsystems Avishek Choudhury, Brototi Mondal, Kolin Paul, Biplab K. Sikdar
2023	J	`jnl`	Fundus Imaging-Based Healthcare: Present and Future. ACM Trans. Comput. Heal. Vijay Kumar, Kolin Paul
2022	J	`jnl`	Denial-of-Service Attacks Pre-Emptive and Detection Framework for Synchrophasor Based Wide Area Protection Applications. IEEE Syst. J. Astha Chawla, Animesh Singh, Prakhar Agrawal, Bijaya Ketan Panigrahi, Bhavesh R. Bhalja, Kolin Paul
2022	—	`conf`	Improved Blood Vessels Segmentation of Infant Retinal Image. BIOSTEC (Selected Papers) Vijay Kumar, Het Patel, Shorya Azad, Kolin Paul
2022	—	`conf`	Improved Blood Vessels Segmentation of Retinal Image of Infants. HEALTHINF Vijay Kumar, Het Patel, Kolin Paul, Abhidnya Surve, Shorya Azad, Rohan Chawla
2022	J	`jnl`	Minimizing Off-Chip Memory Access for CNN Accelerators. IEEE Consumer Electron. Mag. Saurabh Tewari, Anshul Kumar, Kolin Paul
2022	A	`conf`	SACC: Split and Combine Approach to Reduce the Off-chip Memory Accesses of LSTM Accelerators. DATE Saurabh Tewari, Anshul Kumar, Kolin Paul
2022	J	`jnl`	SmartPatch: A patch prioritization framework. Comput. Ind. Geeta Yadav, Praveen Gauravaram, Arun Kumar Jindal, Kolin Paul
2021	J	`jnl`	Architecture and security of SCADA systems: A review. Int. J. Crit. Infrastructure Prot. Geeta Yadav, Kolin Paul
2021	—	`conf`	DL-Assisted ROP Screening Technique. BIOSTEC (Selected Papers) Vijay Kumar, Het Patel, Shorya Azad, Kolin Paul, Abhidnya Surve, Rohan Chawla
2021	—	`conf`	Deep Learning Assisted Retinopathy of Prematurity Screening Technique. HEALTHINF Vijay Kumar, Het Patel, Kolin Paul, Abhidnya Surve, Shorya Azad, Rohan Chawla
2021	J	`jnl`	Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators. IEEE Embed. Syst. Lett. Rajesh Kedia, Shikha Goel, M. Balakrishnan, Kolin Paul, Rijurekha Sen
2021	—	`conf`	DevFing: Robust LCR Based Device Fingerprinting. MECO Vijay Kumar, Kolin Paul
2021	B	`conf`	Global Monitor using SpatioTemporally Correlated Local Monitors. NCA Geeta Yadav, Kolin Paul
2021	C	`conf`	Scheduling Persistent and Fully Cooperative Instructions. DSD Yu Yang, Ahmed Hemani, Kolin Paul
2021	Misc	`conf`	Scheduling Persistent and Fully Cooperative Instructions. FCCM Yu Yang, Ahmed Hemani, Kolin Paul
2020	C	`conf`	A Security Verification Template to Assess Cache Architecture Vulnerabilities. DDECS Tara Ghasempouri, Jaan Raik, Kolin Paul, Cezar Reinbrecht, Said Hamdioui, Mottaqiallah Taouil
2020	J	`jnl`	Airmed: Efficient Self-Healing Network of Low-End Devices. CoRR Sourav Das, Samuel Wedaj, Kolin Paul, Umesh Bellur, Vinay Joseph Ribeiro
2020	J	`jnl`	Architecture and Security of SCADA Systems: A Review. CoRR Geeta Yadav, Kolin Paul
2020	—	`conf`	Bus Width Aware Off-Chip Memory Access Minimization for CNN Accelerators. ISVLSI Saurabh Tewari, Anshul Kumar, Kolin Paul
2020	J	`jnl`	Denial-of-Service Resilient Frameworks for Synchrophasor-Based Wide Area Monitoring Systems. Computer Astha Chawla, Prakhar Agrawal, Animesh Singh, Bijaya Ketan Panigrahi, Kolin Paul, Bhavesh R. Bhalja
2020	—	`conf`	Detection and Mitigation of LFA Attack in SDN-IoT Network. AINA Workshops Alaa M. Allakany, Geeta Yadav, Kolin Paul, Koji Okamura
2020	C	`conf`	Early RTL Analysis for SCA Vulnerability in Fuzzy Extractors of Memory-Based PUF Enabled Devices. VLSI-SOC Xinhui Lai, Maksim Jenihhin, Georgios N. Selimis, Sven Goossens, Roel Maes, Kolin Paul
2020	J	`jnl`	Early RTL Analysis for SCA Vulnerability in Fuzzy Extractors of Memory-Based PUF Enabled Devices. CoRR Xinhui Lai, Maksim Jenihhin, Georgios N. Selimis, Sven Goossens, Roel Maes, Kolin Paul
2020	—	`conf`	Geodetic Distance and Dynamic Outlier Exclusion in EM Optimization of Self Exciting Point Process for Homicide Prediction in Chicago. IIAI-AAI B. Shanker Jaiswal, B. Chandra, Kolin Paul
2020	J	`jnl`	Guest Editorial: Special Issue on Architectures and Design Methods for Neural Networks. J. Signal Process. Syst. Ahmed Hemani, Muhammad Shafique, Kolin Paul
2020	—	`conf`	IoT-PEN: A Penetration Testing Framework for IoT. ICOIN Geeta Yadav, Kolin Paul, Alaa M. Allakany, Koji Okamura
2020	J	`jnl`	IoT-PEN: An E2E Penetration Testing Framework for IoT. J. Inf. Process. Geeta Yadav, Kolin Paul, Alaa M. Allakany, Koji Okamura
2020	—	`conf`	NV-SP: A New High Performance and Low Energy NVM-Based Scratch Pad. ISVLSI Ameer Shalabi, Kolin Paul, Tara Ghasempouri, Jaan Raik
2020	J	`jnl`	PASCAL: Timing SCA Resistant Design and Verification Flow. CoRR Xinhui Lai, Maksim Jenihhin, Jaan Raik, Kolin Paul
2019	Misc	`conf`	A case for design space exploration of context-aware adaptive embedded systems: work-in-progress. CODES+ISSS Rajesh Kedia, M. Balakrishnan, Kolin Paul
2019	—	`conf`	Approximate Computing Applied to Bacterial Genome Identification using Self-Organizing Maps. ISVLSI Dimitrios Stathis, Yu Yang, Saurabh Tewari, Ahmed Hemani, Kolin Paul, Manfred G. Grabherr, Rafi Ahmad
2019	C	`conf`	Assessment of SCADA System Vulnerabilities. ETFA Geeta Yadav, Kolin Paul
2019	J	`jnl`	DADS: Decentralized Attestation for Device Swarms. ACM Trans. Priv. Secur. Samuel Wedaj, Kolin Paul, Vinay J. Ribeiro
2019	J	`jnl`	Equivalence Checking and Compaction of n-input Majority Terms Using Implicants of Majority. J. Electron. Test. Rajeswari Devadoss, Kolin Paul, M. Balakrishnan
2019	C	`conf`	GRanDE: Graphical Representation and Design Space Exploration of Embedded Systems. DSD Rajesh Kedia, M. Balakrishnan, Kolin Paul
2019	Misc	`conf`	Majority Logic: Prime Implicants and n-Input Majority Term Equivalence. VLSID Rajeswari Devadoss, Kolin Paul, M. Balakrishnan
2019	C	`conf`	PASCAL: Timing SCA Resistant Design and Verification Flow. IOLTS Xinhui Lai, Maksim Jenihhin, Jaan Raik, Kolin Paul
2019	C	`conf`	PatchRank: Ordering updates for SCADA systems. ETFA Geeta Yadav, Kolin Paul
2019	—	`conf`	Penetration Testing Framework for IoT. IIAI-AAI Geeta Yadav, Alaa M. Allakany, Vijay Kumar, Kolin Paul, Koji Okamura
2018	—	`conf`	DAPP: Accelerating Training of DNN. HPCC/SmartCity/DSS Sapna Sapna, N. S. Sreenivasalu, Kolin Paul
2018	—	`conf`	RiBoSOM: rapid bacterial genome identification using self-organizing map implemented on the synchoros SiLago platform. SAMOS Yu Yang, Dimitrios Stathis, Prashant Sharma, Kolin Paul, Ahmed Hemani, Manfred G. Grabherr, Rafi Ahmad
2018	J	`jnl`	Suboptimal robust stabilization of discrete-time mismatched nonlinear system. IEEE CAA J. Autom. Sinica Niladri Sekhar Tripathy, Indra Narayan Kar, Kolin Paul
2017	J	`jnl`	3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. Int. J. Parallel Program. Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
2017	J	`jnl`	A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. J. Signal Process. Syst. Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
2017	—	`conf`	Design and Development of Robots for ABU Robocon 2016. AIR Varan Gupta, Rohit Patel, Gaurav Sardal, Jyotirmoy Ray, Subir Kumar Saha, Kolin Paul
2017	J	`jnl`	Hardware acceleration of de novo genome assembly. Int. J. Embed. Syst. B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan, Dominique Lavenier
2017	A	`conf`	MOCHA: Morphable Locality and Compression Aware Architecture for Convolutional Neural Networks. IPDPS Syed Mohammad Asad Hassan Jafri, Ahmed Hemani, Kolin Paul, Naeem Abbas
2017	J	`jnl`	Stabilization of Uncertain Discrete-Time Linear System With Limited Communication. IEEE Trans. Autom. Control. Niladri Sekhar Tripathy, I. N. Kar, Kolin Paul
2016	J	`jnl`	Dynamic core allocation for energy efficient video decoding in homogeneous and heterogeneous multicore architectures. Future Gener. Comput. Syst. Rajesh Kumar Pal, Ierum Shanaya, Kolin Paul, Sanjiva Prasad
2016	—	`conf`	GAMS: Genome Assembly on Multi-GPU Using String Graph. HPCC/SmartCity/DSS Gaurav Jain, Lalchand Rathore, Kolin Paul
2016	J	`jnl`	Polymorphic Configuration Architecture for CGRAs. IEEE Trans. Very Large Scale Integr. Syst. Syed Mohammad Asad Hassan Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Peeter Ellervee, Hannu Tenhunen
2016	—	`conf`	mNetra: A Fundoscopy based Optometer. HEALTHINF Vijay Kumar, Kolin Paul
2016	—	`conf`	prasavGraph: Android based Labour Monitoring. HEALTHINF Shalini Singh, Kolin Paul, Geeta Yadav, Sanjiva Prasad
2015	—	`conf`	3D-stacked many-core architecture for biological sequence analysis problems. SAMOS Pei Liu, Ahmed Hemani, Kolin Paul
2015	J	`jnl`	Architecture and Implementation of Dynamic Parallelism, Voltage and Frequency Scaling (PVFS) on CGRAs. ACM J. Emerg. Technol. Comput. Syst. Syed M. A. H. Jafri, Ozan Ozbag, Nasim Farahini, Kolin Paul, Ahmed Hemani, Juha Plosila, Hannu Tenhunen
2015	J	`jnl`	Configurable Architectures for Multi-Mode Floating Point Adders. IEEE Trans. Circuits Syst. I Regul. Pap. Manish Kumar Jaiswal, B. Sharat Chandra Varma, Hayden Kwok-Hay So, M. Balakrishnan, Kolin Paul, Ray C. C. Cheung
2015	—	`conf`	Finite-time robust control of robot manipulator: a SDDRE based approach. AIR Niladri Sekhar Tripathy, Indra Narayan Kar, Kolin Paul
2015	—	`conf`	Fundus Imaging Based Affordable Eye Care. HEALTHINF Kolin Paul, Vijay Kumar
2015	J	`jnl`	Improving Map-Reduce for GPUs with cache. Int. J. High Perform. Syst. Archit. Arun Parakh, M. Balakrishnan, Kolin Paul
2015	—	`conf`	Partial Reconfiguration for Dynamic Mapping of Task Graphs onto 2D Mesh Platform. ARC Mansureh Shahraki Moghaddam, M. Balakrishnan, Kolin Paul
2014	—	`conf`	A Modular Android-Based Multi-sensor mHealth System. BIOSTEC (Selected Papers) Avval Gupta, Anju Kansal, Kolin Paul, Sanjiva Prasad
2014	—	`conf`	A many-core hardware acceleration platform for short read mapping problem using distributed memory interface with 3D-stacked architecture. ISSoC Pei Liu, Ahmed Hemani, Kolin Paul
2014	Misc	`conf`	Accelerating Genome Assembly Using Hard Embedded Blocks in FPGAs. VLSID B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
2014	C	`conf`	An event-triggered based robust control of robot manipulator. ICARCV Niladri Sekhar Tripathy, I. N. Kar, Kolin Paul
2014	—	`conf`	Configurable Architecture for Double/Two-Parallel Single Precision Floating Point Division. ISVLSI Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul
2014	Misc	`conf`	Customizable Compression Architecture for Efficient Configuration in CGRAs. FCCM Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Peeter Ellervee, Juha Plosila, Hannu Tenhunen
2014	—	`conf`	Energy Efficient Dynamic Core Allocation for Video Decoding in Embedded Multicore Architectures. HPCC/CSS/ICESS Rajesh Kumar Pal, Kolin Paul, Sanjiva Prasad
2014	C	`conf`	High Level Design Approach to Accelerate De Novo Genome Assembly Using FPGAs. DSD B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
2014	Misc	`conf`	Mapping Tasks to a Dynamically Reconfigurable Coarse Grained Array. FCCM Mansureh Shahraki Moghaddam, Kolin Paul, M. Balakrishnan
2014	C	`conf`	Morphable Compression Architecture for Efficient Configuration in CGRAs. DSD Syed Mohammad Asad Hassan Jafri, Muhammad Adeel Tajammul, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Peeter Ellervee, Juha Plosila, Hannu Tenhunen
2014	J	`jnl`	Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric. Microprocess. Microsystems Nasim Farahini, Ahmed Hemani, Hasan Sohofi, Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Kolin Paul
2014	J	`jnl`	Private reliability environments for efficient fault-tolerance in CGRAs. Des. Autom. Embed. Syst. Syed M. A. H. Jafri, Stanislaw J. Piestrak, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2014	J	`jnl`	ReKonf: Dynamically reconfigurable multiCore architecture. J. Parallel Distributed Comput. Rajesh Kumar Pal, Kolin Paul, Sanjiva Prasad
2014	—	`conf`	RuRot: Run-time rotatable-expandable partitions for efficient mapping in CGRAs. ICSAMOS Syed M. A. H. Jafri, Guilermo Serrano, Junaid Iqbal, Masoud Daneshtalab, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2014	J	`jnl`	Series Expansion based Efficient Architectures for Double Precision Floating Point Division. Circuits Syst. Signal Process. Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul
2014	B	`conf`	TransPar: Transformation based dynamic Parallelism for low power CGRAs. FPL Syed M. A. H. Jafri, Guilermo Serrano, Masoud Daneshtalab, Naeem Abbas, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2014	J	`jnl`	Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder. IEEE Trans. Circuits Syst. II Express Briefs Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul
2014	—	`conf`	mDROID - An Affordable Android based mHealth System. HEALTHINF Anju Kansal, Avval Gupta, Kolin Paul, Sanjiva Prasad
2013	Misc	`conf`	Accelerating 3D-FFT Using Hard Embedded Blocks in FPGAs. VLSI Design B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan
2013	—	`conf`	Design and Implementation of High Performance Architectures with Partially Reconfigurable CGRAs. IPDPS Workshops Mansureh Shahraki Moghaddam, Kolin Paul, M. Balakrishnan
2013	C	`conf`	Distributed Runtime Computation of Constraints for Multiple Inner Loops. DSD Nasim Farahini, Ahmed Hemani, Kolin Paul
2013	C	`conf`	Energy-Aware Fault-Tolerant CGRAs Addressing Application with Different Reliability Needs. DSD Syed M. A. H. Jafri, Stanislaw J. Piestrak, Kolin Paul, Ahmed Hemani, Juha Plosila, Hannu Tenhunen
2013	—	`conf`	Energy-aware coarse-grained reconfigurable architectures using dynamically reconfigurable isolation cells. ISQED Syed M. A. H. Jafri, Ozan Bag, Ahmed Hemani, Nasim Farahini, Kolin Paul, Juha Plosila, Hannu Tenhunen
2013	J	`jnl`	Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes. Microprocess. Microsystems Syed M. A. H. Jafri, Liang Guang, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2013	—	`conf`	Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs. ICSAMOS Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2013	Misc	`conf`	FAssem: FPGA Based Acceleration of De Novo Genome Assembly. FCCM B. Sharat Chandra Varma, Kolin Paul, M. Balakrishnan, Dominique Lavenier
2013	Misc	`conf`	GAGM: Genome assembly on GPU using mate pairs. HiPC Ashutosh Jain, Anshuj Garg, Kolin Paul
2013	—	`conf`	GGAKE: GPU Based Genome Assembly Using K-Mer Extension. HPCC/EUC Anshuj Garg, Ashutosh Jain, Kolin Paul
2013	C	`conf`	High performance 3D-FFT implementation. ISCAS U. Nidhi, Kolin Paul, Ahmed Hemani, Anshul Kumar
2013	—	`conf`	Implementation and evaluation of configuration scrubbing on CGRAs: A case study. ISSoC Syed M. A. H. Jafri, Stanislaw J. Piestrak, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2013	Misc	`conf`	Provenance framework for mHealth. COMSNETS Aarathi Prasad, Ronald A. Peterson, Shrirang Mare, Jacob Sorber, Kolin Paul, David Kotz
2012	C	`conf`	Energy-Aware Fault-Tolerant Network-on-Chips for Addressing Multiple Traffic Classes. DSD Syed M. A. H. Jafri, Liang Guang, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2012	—	`conf`	Improved Bioinformatics Processing Unit for Multiple Applications. IPDPS Workshops Pei Liu, Ahmed Hemani, Kolin Paul
2012	—	`conf`	Performance Estimation of GPUs with Cache. IPDPS Workshops Arun Parakh, M. Balakrishnan, Kolin Paul
2012	C	`conf`	ReKonf: A Reconfigurable Adaptive ManyCore Architecture. ISPA Rajesh Kumar Pal, Kolin Paul, Sanjiva Prasad
2012	—	`conf`	Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation. PECCS Syed M. A. H. Jafri, Liang Guang, Axel Jantsch, Kolin Paul, Ahmed Hemani, Hannu Tenhunen
2012	C	`conf`	reMORPH: A Runtime Reconfigurable Architecture. DSD Kolin Paul, Chinmaya Dash, Mansureh Shahraki Moghaddam
2011	—	`conf`	A Coarse-Grained Reconfigurable Processor for Sequencing and Phylogenetic Algorithms in Bioinformatics. ReConFig Pei Liu, Fatemeh O. Ebrahim, Ahmed Hemani, Kolin Paul
2011	Misc	`conf`	A Reconfigurable Processor for Phylogenetic Inference. VLSI Design Pei Liu, Ahmed Hemani, Kolin Paul
2011	J	`jnl`	Analyzing and Improving Performance and Energy Efficiency of Android. J. Low Power Electron. Tapas Kumar Kundu, Kolin Paul
2011	—	`conf`	Architecture and tools for programmable QCA. FPT Rajeswari Devadoss, Kolin Paul, M. Balakrishnan
2011	—	`conf`	Compact generic intermediate representation (CGIR) to enable late binding in coarse grained reconfigurable architectures. FPT Syed M. A. H. Jafri, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2011	—	`conf`	Compression Based Efficient and Agile Configuration Mechanism for Coarse Grained Reconfigurable Architectures. IPDPS Workshops Syed M. A. H. Jafri, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen
2011	Misc	`conf`	Improving Android Performance and Energy Efficiency. VLSI Design Tapas Kumar Kundu, Kolin Paul
2011	J	`jnl`	p-QCA: A Tiled Programmable Fabric Architecture Using Molecular Quantum-Dot Cellular Automata. ACM J. Emerg. Technol. Comput. Syst. Rajeswari Devadoss, Kolin Paul, M. Balakrishnan
2010	—	`conf`	A high-level synthesis flow for custom instruction set extensions for application-specific processors. ASP-DAC Nagaraju Pothineni, Philip Brisk, Paolo Ienne, Anshul Kumar, Kolin Paul
2010	—	`conf`	A tiled programmable fabric using QCA. FPT Rajeswari Devadoss, Kolin Paul, M. Balakrishnan
2010	C	`conf`	Android on Mobile Devices: An Energy Perspective. CIT Kolin Paul, Tapas Kumar Kundu
2010	Misc	`conf`	Clocking-Based Coplanar Wire Crossing Scheme for QCA. VLSI Design Rajeswari Devadoss, Kolin Paul, M. Balakrishnan
2008	Misc	`conf`	A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions. VLSI Design Nagaraju Pothineni, Anshul Kumar, Kolin Paul
2008	Misc	`conf`	Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors. VLSI Design Nagaraju Pothineni, Anshul Kumar, Kolin Paul
2007	Misc	`conf`	Application Specific Datapath Extension with Distributed I/O Functional Units. VLSI Design Nagaraju Pothineni, Anshul Kumar, Kolin Paul
2007	—	`conf`	Recurring Pattern Identification and its Application to Instruction Set Extension. CDES Nagaraju Pothineni, Anshul Kumar, Kolin Paul
2007	C	`conf`	Silicon Compaction/Defragmentation for Partial Runtime Reconfiguration. DSD Kolin Paul, Joël Porquet, Josep Llosa
2006	—	`conf`	A FLOPs Based Model for Performance Analysis and Scheduling of Applications for Single and Multiple CPUs. ICPP Workshops Nilesh Padhariya, Kolin Paul, Dheeraj Bhardwaj
2006	—	`conf`	Defect-Aware Design Paradigm for Reconfigurable Architectures. ISVLSI Rahul Jain, Anindita Mukherjee, Kolin Paul
2005	—	`conf`	A 1.5-D Architecture for Back-Propagation Training. ERSA Sanjay V. Rajopadhye, Kolin Paul
2005	A	`conf`	An FPGA Based Test Bed for Bio Inspired Computation. IPDPS Kolin Paul
2002	J	`jnl`	Theory of Extended Linear Machines. IEEE Trans. Computers Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri
2000	Misc	`conf`	Application of GF(2p) CA in Burst Error Correcting Codes. VLSI Design Kolin Paul, Dipanwita Roy Chowdhury
2000	Misc	`conf`	GF(2p) CA Based Vector Quantization for Fast Encoding of Still Images. VLSI Design Kolin Paul, Ranadeep Ghosal, Biplab K. Sikdar, Santashil Pal Chaudhuri, Dipanwita Roy Chowdhury
2000	Misc	`conf`	Scalable Pipelined Micro-Architecture for Wavelet Transform. VLSI Design Kolin Paul, Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury
2000	Misc	`conf`	Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator. VLSI Design Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee
2000	Misc	`conf`	Theory and Applications of Cellular Automata for VLSI Design and Testing. VLSI Design Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury, Kolin Paul, Biplab K. Sikdar
1999	Misc	`conf`	A VLSI Architecture for On-Line Image Decompression Using GF(28) Cellular Automata. VLSI Design Kolin Paul, P. Dutta, Dipanwita Roy Chowdhury, Prasanta Kumar Nandi, Parimal Pal Chaudhuri
1999	Misc	`conf`	Cellular Automata Based Transform Coding for Image Compression. HiPC Kolin Paul, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri
1998	—	`conf`	Theory and Application of Multiple Attractor Cellular Automata for Fault Diagnosis. Asian Test Symposium Kolin Paul, A. Roy, Prasanta Kumar Nandi, B. N. Roy, M. Deb Purkayastha, Santanu Chattopadhyay, Parimal Pal Chaudhuri