Kohei Miyase - RankMe

84 papers A* 1A 14B 6C 7Misc 6Journal 26Unranked 24

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Highly Efficient Built-In Self-Repair Techniques for NAND Flash Memory With Fine-Grained Redundancies. IEEE Access Shyue-Kung Lu, Shi-Chun Tseng, Kohei Miyase
2025	C	`conf`	Motion Classification by Utilizing Machine Learning for Acceleration Data. ICCE Kenzaburo Ishizu, Toshimitsu Honda, Kohei Miyase, Stefan Holst, Shudai Ishikawa, Roshwin Sengupta, Ilia Polian
2025	B	`conf`	Synergistic Built-In ECC Repair (BIER) Technique for Enhancing Yield and Reliability of Flash Memory. ETS Shyue-Kung Lu, Chun-Kai Chao, Kohei Miyase
2025	—	`conf`	Two-Step Transition Zeroization Techniques for MLC STTMRAM. ATS Shyue-Kung Lu, Tzu-En Huang, Kohei Miyase
2022	A	`conf`	A Practical Online Error Detection Method for Functional Safety Using Three-Site Implications. ITC Kazuya Loki, Yasuyuki Kai, Kohei Miyase, Seiji Kajihara
2022	—	`conf`	Effective Switching Probability Calculation to Locate Hotspots in Logic Circuits. ITC-Asia Taiki Utsunomiya, Ryu Hoshino, Kohei Miyase, Shyue-Kung Lu, Xiaoqing Wen, Seiji Kajihara
2022	—	`conf`	Fault Resilience Techniques for Flash Memory of DNN Accelerators. ITC-Asia Shyue-Kung Lu, Yu-Sheng Wu, Jin-Hua Hong, Kohei Miyase
2022	A	`conf`	Fault Resilience Techniques for Flash Memory of DNN Accelerators. ITC Shyue-Kung Lu, Yu-Sheng Wu, Jin-Hua Hong, Kohei Miyase
2022	A	`conf`	Fine-Grained Built-In Self-Repair Techniques for NAND Flash Memories. ITC Shyue-Kung Lu, Shi-Chun Tseng, Kohei Miyase
2021	J	`jnl`	Fault-Aware Dependability Enhancement Techniques for Phase Change Memory. J. Electron. Test. Shyue-Kung Lu, Hui-Ping Li, Kohei Miyase, Chun-Lung Hsu, Chi-Tien Sun
2021	J	`jnl`	On the Efficacy of Scan Chain Grouping for Mitigating IR-Drop-Induced Test Data Corruption. IEICE Trans. Inf. Syst. Yucong Zhang, Stefan Holst, Xiaoqing Wen, Kohei Miyase, Seiji Kajihara, Jun Qian
2020	C	`conf`	Analyzing Running Form with Acceleration Sensor. ICCE Chihiro Koga, Kohei Miyase, Masato Tokui
2020	J	`jnl`	Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments. IEEE Trans. Aerosp. Electron. Syst. Aibin Yan, Xiangfeng Feng, Yuanjie Hu, Chaoping Lai, Jie Cui, Zhili Chen, Kohei Miyase, Xiaoqing Wen
2019	—	`conf`	A Static Method for Analyzing Hotspot Distribution on the LSI. ITC-Asia Kohei Miyase, Yudai Kawano, Shyue-Kung Lu, Xiaoqing Wen, Seiji Kajihara
2019	J	`jnl`	Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM. J. Electron. Test. Shyue-Kung Lu, Hung-Kai Huang, Chun-Lung Hsu, Chi-Tien Sun, Kohei Miyase
2018	C	`conf`	Adaptive ECC Techniques for Reliability and Yield Enhancement of Phase Change Memory. IOLTS Shyue-Kung Lu, Hui-Ping Li, Kohei Miyase
2018	—	`conf`	Clock-Skew-Aware Scan Chain Grouping for Mitigating Shift Timing Failures in Low-Power Scan Testing. ATS Yucong Zhang, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Hans-Joachim Wunderlich, Jun Qian
2018	—	`conf`	Progressive ECC Techniques for Phase Change Memory. ATS Shyue-Kung Lu, Hui-Ping Li, Kohei Miyase
2017	A	`conf`	Analysis and mitigation or IR-Drop induced scan shift-errors. ITC Stefan Holst, Eric Schneider, Koshi Kawagoe, Michael A. Kochte, Kohei Miyase, Hans-Joachim Wunderlich, Seiji Kajihara, Xiaoqing Wen
2017	—	`conf`	Scan Chain Grouping for Mitigating IR-Drop-Induced Test Data Corruption. ATS Yucong Zhang, Stefan Holst, Xiaoqing Wen, Kohei Miyase, Seiji Kajihara, Jun Qian
2016	—	`conf`	Formal Test Point Insertion for Region-based Low-Capture-Power Compact At-Speed Scan Test. ATS Stephan Eggersglüß, Stefan Holst, Daniel Tille, Kohei Miyase, Xiaoqing Wen
2016	J	`jnl`	Logic-Path-and-Clock-Path-Aware At-Speed Scan Test Generation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Fuqiang Li, Xiaoqing Wen, Kohei Miyase, Stefan Holst, Seiji Kajihara
2016	—	`conf`	On Optimal Power-Aware Path Sensitization. ATS Matthias Sauer, Jie Jiang, Sven Reimer, Kohei Miyase, Xiaoqing Wen, Bernd Becker, Ilia Polian
2016	B	`conf`	SAT-based post-processing for regional capture power reduction in at-speed scan test generation. ETS Stephan Eggersglüß, Kohei Miyase, Xiaoqing Wen
2015	B	`conf`	A soft-error tolerant TCAM using partial don't-care keys. ETS Infall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase
2015	B	`conf`	Identification of high power consuming areas with gate type and logic level information. ETS Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
2015	—	`conf`	Logic/Clock-Path-Aware At-Speed Scan Test Generation for Avoiding False Capture Failures and Reducing Clock Stretch. ATS Koji Asada, Xiaoqing Wen, Stefan Holst, Kohei Miyase, Seiji Kajihara, Michael A. Kochte, Eric Schneider, Hans-Joachim Wunderlich, Jun Qian
2014	J	`jnl`	On Achieving Capture Power Safety in At-Speed Scan-Based Logic BIST. IEICE Trans. Inf. Syst. Akihiro Tomita, Xiaoqing Wen, Yasuo Sato, Seiji Kajihara, Kohei Miyase, Stefan Holst, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang
2014	—	`conf`	Soft-error tolerant TCAMs for high-reliability packet classifications. APCCAS Infall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase
2013	J	`jnl`	A Capture-Safety Checking Metric Based on Transition-Time-Relation for At-Speed Scan Testing. IEICE Trans. Inf. Syst. Kohei Miyase, Ryota Sakai, Xiaoqing Wen, Masao Aso, Hiroshi Furukawa, Yuta Yamato, Seiji Kajihara
2013	J	`jnl`	LCTI-SS: Low-Clock-Tree-Impact Scan Segmentation for Avoiding Shift Timing Failures in Scan Testing. IEEE Des. Test Yuta Yamato, Kohei Miyase, Seiji Kajihara, Xiaoqing Wen, Laung-Terng Wang, Michael A. Kochte
2013	Misc	`conf`	On Guaranteeing Capture Safety in At-Speed Scan Testing with Broadcast-Scan-Based Test Compression. VLSI Design Kazunari Enokimoto, Xiaoqing Wen, Kohei Miyase, Jiun-Lang Huang, Seiji Kajihara, Laung-Terng Wang
2013	J	`jnl`	Scan-Out Power Reduction for Logic BIST. IEICE Trans. Inf. Syst. Senling Wang, Yasuo Sato, Seiji Kajihara, Kohei Miyase
2013	—	`conf`	Search Space Reduction for Low-Power Test Generation. Asian Test Symposium Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
2012	—	`conf`	A Scan-Out Power Reduction Method for Multi-cycle BIST. Asian Test Symposium Senling Wang, Yasuo Sato, Kohei Miyase, Seiji Kajihara
2012	Misc	`conf`	A novel capture-safety checking method for multi-clock designs and accuracy evaluation with delay capture circuits. VTS Kohei Miyase, Masao Aso, Ryou Ootsuka, Xiaoqing Wen, Hiroshi Furukawa, Yuta Yamato, Kazunari Enokimoto, Seiji Kajihara
2012	—	`conf`	Low Power BIST for Scan-Shift and Capture Power. Asian Test Symposium Yasuo Sato, Senling Wang, Takaaki Kato, Kohei Miyase, Seiji Kajihara
2012	A	`conf`	On pinpoint capture power management in at-speed scan test generation. ITC Xiaoqing Wen, Y. Nishida, Kohei Miyase, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang
2011	J	`jnl`	A GA-Based IEICE Trans. Inf. Syst. Yuta Yamato, Xiaoqing Wen, Kohei Miyase, Hiroshi Furukawa, Seiji Kajihara
2011	A	`conf`	A novel scan segmentation design method for avoiding shift timing failure in scan testing. ITC Yuta Yamato, Xiaoqing Wen, Michael A. Kochte, Kohei Miyase, Seiji Kajihara, Laung-Terng Wang
2011	J	`jnl`	Distribution-Controlled X-Identification for Effective Reduction of Launch-Induced IR-Drop in At-Speed Scan Testing. IEICE Trans. Inf. Syst. Kohei Miyase, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Yuta Yamato, Hiroshi Furukawa, Xiaoqing Wen, Seiji Kajihara
2011	—	`conf`	Effective Launch-to-Capture Power Reduction for LOS Scheme with Adjacent-Probability-Based X-Filling. Asian Test Symposium Kohei Miyase, Y. Uchinodan, Kazunari Enokimoto, Yuta Yamato, Xiaoqing Wen, Seiji Kajihara, Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Arnaud Virazel
2011	—	`conf`	Efficient BDD-based Fault Simulation in Presence of Unknown Values. Asian Test Symposium Michael A. Kochte, Sandip Kundu, Kohei Miyase, Xiaoqing Wen, Hans-Joachim Wunderlich
2011	—	`conf`	Power-Aware Test Pattern Generation for At-Speed LOS Testing. Asian Test Symposium Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Kohei Miyase, Xiaoqing Wen
2011	Misc	`conf`	Power-aware test generation with guaranteed launch safety for at-speed scan testing. VTS Xiaoqing Wen, Kazunari Enokimoto, Kohei Miyase, Yuta Yamato, Michael A. Kochte, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor
2011	A	`conf`	SAT-based capture-power reduction for at-speed broadcast-scan-based test compression architectures. ISLPED Michael A. Kochte, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Kazunari Enokimoto, Hans-Joachim Wunderlich
2011	A	`conf`	Transition-Time-Relation based capture-safety checking for at-speed scan test generation. DATE Kohei Miyase, Xiaoqing Wen, Masao Aso, Hiroshi Furukawa, Yuta Yamato, Seiji Kajihara
2010	J	`jnl`	A Study of Capture-Safe Test Generation Flow for At-Speed Testing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kohei Miyase, Xiaoqing Wen, Seiji Kajihara, Yuta Yamato, Atsushi Takashima, Hiroshi Furukawa, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Kewal K. Saluja
2010	J	`jnl`	High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme. IEICE Trans. Inf. Syst. Kohei Miyase, Xiaoqing Wen, Hiroshi Furukawa, Yuta Yamato, Seiji Kajihara, Patrick Girard, Laung-Terng Wang, Mohammad Tehranipoor
2010	A	`conf`	Is test power reduction through X-filling good enough? ITC Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Mohammad Tehranipoor, Kohei Miyase, Xiaoqing Wen, Nisar Ahmed
2010	J	`jnl`	On Delay Test Quality for Test Cubes. Inf. Media Technol. Shinji Oku, Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen
2010	J	`jnl`	On Delay Test Quality for Test Cubes. IPSJ Trans. Syst. LSI Des. Methodol. Shinji Oku, Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen
2010	B	`conf`	On estimation of NBTI-Induced delay degradation. ETS Mitsumasa Noda, Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen, Yukiya Miura
2009	C	`conf`	A GA-Based Method for High-Quality X-Filling to Reduce Launch Switching Activity in At-speed Scan Testing. PRDC Yuta Yamato, Xiaoqing Wen, Kohei Miyase, Hiroshi Furukawa, Seiji Kajihara
2009	A	`conf`	A novel post-ATPG IR-drop reduction scheme for at-speed scan testing in broadcast-scan-based test compression environment. ICCAD Kohei Miyase, Yuta Yamato, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Xiaoqing Wen, Seiji Kajihara
2009	—	`conf`	CAT: A Critical-Area-Targeted Test Set Modification Scheme for Reducing Launch Switching Activity in At-Speed Scan Testing. Asian Test Symposium Kazunari Enokimoto, Xiaoqing Wen, Yuta Yamato, Kohei Miyase, H. Sone, Seiji Kajihara, Masao Aso, Hiroshi Furukawa
2009	J	`jnl`	Power Supply Noise Reduction for At-Speed Scan Testing in Linear-Decompression Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Meng-Fan Wu, Jiun-Lang Huang, Xiaoqing Wen, Kohei Miyase
2008	B	`conf`	A Capture-Safe Test Generation Scheme for At-Speed Scan Testing. ETS Xiaoqing Wen, Kohei Miyase, Seiji Kajihara, Hiroshi Furukawa, Yuta Yamato, Atsushi Takashima, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Kewal K. Saluja
2008	J	`jnl`	A Novel Per-Test Fault Diagnosis Method Based on the Extended IEICE Trans. Inf. Syst. Yuta Yamato, Yusuke Nakamura, Kohei Miyase, Xiaoqing Wen, Seiji Kajihara
2008	—	`conf`	CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme for Reducing Yield Loss Risk in At-Speed Scan Testing. ATS Hiroshi Furukawa, Xiaoqing Wen, Kohei Miyase, Yuta Yamato, Seiji Kajihara, Patrick Girard, Laung-Terng Wang, Mohammad Tehranipoor
2008	C	`conf`	Diagnosis of Realistic Defects Based on the X-Fault Model. DDECS Ilia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen
2008	A	`conf`	Effective IR-drop reduction in at-speed scan testing using Distribution-Controlling X-Identification. ICCAD Kohei Miyase, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Yuta Yamato, Hiroshi Furukawa, Xiaoqing Wen, Seiji Kajihara
2008	J	`jnl`	Low Capture Switching Activity Test Generation for Reducing IR-Drop in At-Speed Scan Testing. J. Electron. Test. Xiaoqing Wen, Kohei Miyase, Tatsuya Suzuki, Seiji Kajihara, Laung-Terng Wang, Kewal K. Saluja, Kozo Kinoshita
2008	J	`jnl`	On Detection of Bridge Defects with Stuck-at Tests. IEICE Trans. Inf. Syst. Kohei Miyase, Kenta Terashima, Xiaoqing Wen, Seiji Kajihara, Sudhakar M. Reddy
2008	A	`conf`	Reducing Power Supply Noise in Linear-Decompressor-Based Test Data Compression Environment for At-Speed Scan Testing. ITC Meng-Fan Wu, Jiun-Lang Huang, Xiaoqing Wen, Kohei Miyase
2007	J	`jnl`	A Novel ATPG Method for Capture Power Reduction during Scan Testing. IEICE Trans. Inf. Syst. Xiaoqing Wen, Seiji Kajihara, Kohei Miyase, Tatsuya Suzuki, Kewal K. Saluja, Laung-Terng Wang, Kozo Kinoshita
2007	A	`conf`	A novel scheme to reduce power supply noise for high-quality at-speed scan testing. ITC Xiaoqing Wen, Kohei Miyase, Seiji Kajihara, Tatsuya Suzuki, Yuta Yamato, Patrick Girard, Yuji Ohsumi, Laung-Terng Wang
2007	A*	`conf`	Critical-Path-Aware X-Filling for Effective IR-Drop Reduction in At-Speed Scan Testing. DAC Xiaoqing Wen, Kohei Miyase, Tatsuya Suzuki, Seiji Kajihara, Yuji Ohsumi, Kewal K. Saluja
2006	Misc	`conf`	A New ATPG Method for Efficient Capture Power Reduction During Scan Testing. VTS Xiaoqing Wen, Seiji Kajihara, Kohei Miyase, Tatsuya Suzuki, Kewal K. Saluja, Laung-Terng Wang, Khader S. Abdel-Hafez, Kozo Kinoshita
2006	J	`jnl`	A Per-Test Fault Diagnosis Method Based on the IEICE Trans. Inf. Syst. Xiaoqing Wen, Seiji Kajihara, Kohei Miyase, Yuta Yamato, Kewal K. Saluja, Laung-Terng Wang, Kozo Kinoshita
2006	C	`conf`	Highly-Guided X-Filling Method for Effective Low-Capture-Power Scan Test Generation. ICCD Xiaoqing Wen, Kohei Miyase, Tatsuya Suzuki, Yuta Yamato, Seiji Kajihara, Laung-Terng Wang, Kewal K. Saluja
2005	J	`jnl`	Efficient Test Set Modification for Capture Power Reduction. J. Low Power Electron. Xiaoqing Wen, Tatsuya Suzuki, Seiji Kajihara, Kohei Miyase, Yoshihiro Minamoto, Laung-Terng Wang, Kewal K. Saluja
2005	—	`conf`	On Improving Defect Coverage of Stuck-at Fault Tests. Asian Test Symposium Kohei Miyase, Kenta Terashima, Seiji Kajihara, Xiaoqing Wen, Sudhakar M. Reddy
2004	J	`jnl`	Don't Care Identification and Statistical Encoding for Test Data Compression. IEICE Trans. Inf. Syst. Seiji Kajihara, Kenjiro Taniguchi, Kohei Miyase, Irith Pomeranz, Sudhakar M. Reddy
2004	—	`conf`	Multiple Scan Tree Design with Test Vector Modification. Asian Test Symposium Kohei Miyase, Seiji Kajihara, Sudhakar M. Reddy
2004	J	`jnl`	XID: Don't care identification of test patterns for combinational circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kohei Miyase, Seiji Kajihara
2003	J	`jnl`	On test data volume reduction for multiple scan chain designs. ACM Trans. Design Autom. Electr. Syst. Sudhakar M. Reddy, Kohei Miyase, Seiji Kajihara, Irith Pomeranz
2003	—	`conf`	Optimal Scan Tree Construction with Test Vector Modification for Test Compression. Asian Test Symposium Kohei Miyase, Seiji Kajihara
2002	—	`conf`	A Method of Static Test Compaction Based on Don't Care Identification. DELTA Kohei Miyase, Seiji Kajihara, Sudhakar M. Reddy
2002	C	`conf`	Don't-Care Identification on Specific Bits of Test Patterns. ICCD Kohei Miyase, Seiji Kajihara, Irith Pomeranz, Sudhakar M. Reddy
2002	Misc	`conf`	On Test Data Volume Reduction for Multiple Scan Chain Designs. VTS Sudhakar M. Reddy, Kohei Miyase, Seiji Kajihara, Irith Pomeranz
2002	—	`conf`	Test Data Compression Using Don?t-Care Identification and Statistical Encoding. Asian Test Symposium Seiji Kajihara, Kenjiro Taniguchi, Kohei Miyase, Irith Pomeranz, Sudhakar M. Reddy
2002	Misc	`conf`	Test Vector Modification for Power Reduction during Scan Testing. VTS Seiji Kajihara, Koji Ishida, Kohei Miyase
2001	A	`conf`	On Identifying Don't Care Inputs of Test Patterns for Combinational Circuits. ICCAD Seiji Kajihara, Kohei Miyase