Kleanthis Papachatzopoulos

11 papers C 6Journal 5
YearRankTypeTitle / Venue / Authors
2023 J jnl
Noise-Shaping Binary-to-Stochastic Converters for Reduced-Length Bit-Streams.
IEEE Trans. Emerg. Top. Comput.
Kleanthis Papachatzopoulos, Vassilis Paliouras
2023 J jnl
Path-Based Delay Variation Models for Parallel-Prefix Adders.
IEEE Trans. Emerg. Top. Comput.
Kleanthis Papachatzopoulos, Vassilis Paliouras
2022 C conf
Sensitivity to Threshold Voltage Variations of Exact and Incomplete Prefix Addition Trees.
ISCAS
Kleanthis Papachatzopoulos, Vassilis Paliouras
2021 C conf
A Novel Stochastic Polar Architecture for All-Digital Transmission.
ISCAS
Chris Andriakopoulos, Kleanthis Papachatzopoulos, Vassilis Paliouras
2021 C conf
Sum Propagate Adders.
ARITH
Giorgos Dimitrakopoulos, Kleanthis Papachatzopoulos, Vassilis Paliouras
2021 J jnl
Sum Propagate Adders.
IEEE Trans. Emerg. Top. Comput.
Giorgos Dimitrakopoulos, Kleanthis Papachatzopoulos, Vassilis Paliouras
2020 C conf
Maximum Delay Models for Parallel-Prefix Adders in the Presence of Threshold Voltage Variations.
ARITH
Kleanthis Papachatzopoulos, Vassilis Paliouras
2020 C conf
Novel Noise-Shaping Stochastic-Computing Converters for Digital Filtering.
ISCAS
Kleanthis Papachatzopoulos, Chris Andriakopoulos, Vassilis Paliouras
2019 J jnl
Static Delay Variation Models for Ripple-Carry and Borrow-Save Adders.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kleanthis Papachatzopoulos, Vassilis Paliouras
2018 J jnl
Low-Power Addition With Borrow-Save Adders Under Threshold Voltage Variability.
IEEE Trans. Circuits Syst. II Express Briefs
Kleanthis Papachatzopoulos, Vassilis Paliouras
2016 C conf
Dynamic delay variation behaviour of RNS multiply-add architectures.
ISCAS
Kleanthis Papachatzopoulos, Ioannis Kouretas, Vassilis Paliouras