Klaus Feske

11 papers B 3C 1Journal 1Unranked 6
YearRankTypeTitle / Venue / Authors
2002 C conf
Enhanced Reusability for SoC-Based HW/SW Co-Design.
DSD
Maik Boden, Jörg Schneider, Klaus Feske, Steffen Rülke
2002 J jnl
Entwurfsunterstützung zur hardwarebasierten TCP/IP-Beschleunigung (Design Support for Hardware Based TCP/IP Accelerator).
Informationstechnik Tech. Inform.
Mirko Benz, Uwe Hatnik, Klaus Feske, Jürgen Haufe
2002 B conf
SoC Based Low Cost Design of Digital Audio Broadcasting Transport Network Applications.
FPL
Klaus Feske, Georg Heinrich, Berndt Fritzsche, Mark Langer
2001 — conf
TCP/IP Protocol Engine System Simulation.
PROMS
Mirko Benz, Klaus Feske, Uwe Hatnik, Peter Schwarz
1999 B conf
Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler.
FPL
Klaus Feske, Michael Scholz, Günther Döring, Denis Nareike
1998 — conf
FPGA based prototyping using a target driven FSM partitioning strategy.
ICECS
Klaus Feske, Steffen Rülke, Manfred Koegst
1998 — conf
Multi-Criterial State Assignment for Low Power FSM Design.
EUROMICRO
Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske
1998 — conf
Verringerung der Leistungsaufnahme in sequentiellen Schaltungen durch Vorlogik und zweistufige Zustandskodierung.
MBMV
Manfred Koegst, Günter Franke, Klaus Feske, Steffen Rülke
1997 — conf
Low Power Design of FSMs by State Assignment and Disabling Self-Loops.
EUROMICRO
Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske
1997 B conf
Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs.
FPL
Klaus Feske, Sven Mulka, Manfred Koegst, Günter Elst
1996 — conf
State assignment for FSM low power design.
EURO-DAC
Manfred Koegst, Klaus Feske, Günter Franke