Kizheppatt Vipin

36 papers A 1B 5C 2Misc 2Journal 8Unranked 18

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A cross-layer PUF-secured energy and congestion-aware on-demand routing for multi-UAV networks. Comput. Networks Indu Chandran, Kizheppatt Vipin
2024	J	`jnl`	A PUF secured lightweight mutual authentication protocol for multi-UAV networks. Comput. Networks Indu Chandran, Kizheppatt Vipin
2024	J	`jnl`	Decentralized multi-hop data processing in UAV networks using MARL. Veh. Commun. Indu Chandran, Kizheppatt Vipin
2024	B	`conf`	FCSec: An Open-source Testbed for Security Evaluation on UAV Communications. TrustCom Indu Chandran, Mukesh Narayana Gadde, Kizheppatt Vipin
2023	—	`conf`	Accelerating DNA Sequence Analysis using Content-Addressable Memory in FPGAs. SmartCloud Muhammad Irfan, Kizheppatt Vipin, Rizwan Qureshi
2021	—	`conf`	On the Suitability of Read only Memory for FPGA-Based CAM Emulation Using Partial Reconfiguration. ARC Muhammad Irfan, Kizheppatt Vipin, Ray C. C. Cheung
2020	C	`conf`	High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay. ISCAS Xiangwei Li, Kizheppatt Vipin, Douglas L. Maskell, Suhaib A. Fahmy, Abhishek Kumar Jain
2020	—	`conf`	StocNoC: Accelerating Stochastic Models Through Reconfigurable Network on Chip Architectures. ARC Arshyn Zhanbolatov, Kizheppatt Vipin, Aresh Dadlani, Dmitriy Fedorov
2019	J	`jnl`	AsyncBTree: Revisiting Binary Tree Topology for Efficient FPGA-Based NoC Implementation. Int. J. Reconfigurable Comput. Kizheppatt Vipin
2019	—	`conf`	HBLast: An Open-Source FPGA Library for DNA Sequencing Acceleration. IPDPS Workshops Marzhan Bekbolat, Sabina Kairatova, Ayan Shymyrbay, Kizheppatt Vipin
2019	J	`jnl`	OpenNoC: An Open-Source NoC Infrastructure for FPGA-Based Hardware Acceleration. IEEE Embed. Syst. Lett. Kuladeep Sai Reddy, Kizheppatt Vipin
2019	—	`conf`	Reconfigurable Threshold Logic Networks in FPGA for Moving Object Detection. MWSCAS Alex Pappachen James, Bhaskar Choubey, Kizheppatt Vipin
2019	—	`conf`	ZyNet: Automating Deep Neural Network Implementation on Low-Cost Reconfigurable Edge Computing Platforms. FPT Kizheppatt Vipin
2018	—	`conf`	CANNoC: An open-source NoC architecture for ECU consolidation. MWSCAS Kizheppatt Vipin
2018	J	`jnl`	FPGA Dynamic and Partial Reconfiguration: A Survey of Architectures, Methods, and Applications. ACM Comput. Surv. Kizheppatt Vipin, Suhaib A. Fahmy
2017	B	`conf`	Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs. FPL Kizheppatt Vipin, Jan Gray, Nachiket Kapre
2017	J	`jnl`	Virtualized Execution Runtime for FPGA Accelerators in the Cloud. IEEE Access Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
2016	B	`conf`	Designing a virtual runtime for FPGA accelerators in the cloud. FPL Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
2016	B	`conf`	JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication. FPL Malte Vesper, Dirk Koch, Kizheppatt Vipin, Suhaib A. Fahmy
2015	—	`conf`	Dynamic Cognitive Radios on the Xilinx Zynq Hybrid FPGA. CrownCom Shanker Shreejith, Bhaskar Banarjee, Kizheppatt Vipin, Suhaib A. Fahmy
2015	—	`conf`	Mapping adaptive hardware systems with partial reconfiguration using CoPR for Zynq. AHS Kizheppatt Vipin, Suhaib A. Fahmy
2015	—	`conf`	MiCAP: a custom reconfiguration controller for dynamic circuit specialization. ReConFig Amit Kulkarni, Kizheppatt Vipin, Dirk Stroobandt
2015	C	`conf`	Virtualized FPGA Accelerators for Efficient Cloud Computing. CloudCom Suhaib A. Fahmy, Kizheppatt Vipin, Shanker Shreejith
2014	Misc	`conf`	Automated Partial Reconfiguration Design for Adaptive Systems with CoPR for Zynq. FCCM Kizheppatt Vipin, Suhaib A. Fahmy
2014	B	`conf`	DyRACT: A partial reconfiguration enabled accelerator and test platform. FPL Kizheppatt Vipin, Suhaib A. Fahmy
2014	—	`conf`	Mapping Time-Critical Safety-Critical Cyber Physical Systems to Hybrid FPGAs. CPSNA Kizheppatt Vipin, Shanker Shreejith, Suhaib A. Fahmy, Arvind Easwaran
2014	J	`jnl`	ZyCAP: Efficient Partial Reconfiguration Management on the Xilinx Zynq. IEEE Embed. Syst. Lett. Kizheppatt Vipin, Suhaib A. Fahmy
2013	Misc	`conf`	An Approach to a Fully Automated Partial Reconfiguration Design Flow. FCCM Kizheppatt Vipin, Suhaib A. Fahmy
2013	A	`conf`	An approach for redundancy in FlexRay networks using FPGA partial reconfiguration. DATE Shanker Shreejith, Kizheppatt Vipin, Suhaib A. Fahmy, Martin Lukasiewycz
2013	—	`conf`	Automated Partitioning for Partial Reconfiguration Design of Adaptive Systems. IPDPS Workshops Kizheppatt Vipin, Suhaib A. Fahmy
2013	—	`conf`	System-level FPGA device driver with high-level synthesis support. FPT Kizheppatt Vipin, Shanker Shreejith, Dulitha Gunasekera, Suhaib A. Fahmy, Nachiket Kapre
2012	—	`conf`	A high speed open source controller for FPGA Partial Reconfiguration. FPT Kizheppatt Vipin, Suhaib A. Fahmy
2012	—	`conf`	Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration. ARC Kizheppatt Vipin, Suhaib A. Fahmy
2011	—	`conf`	A threat-based Connect6 implementation on FPGA. FPT Kizheppatt Vipin, Suhaib A. Fahmy
2011	—	`conf`	Efficient region allocation for adaptive partial reconfiguration. FPT Kizheppatt Vipin, Suhaib A. Fahmy
2011	—	`conf`	Enabling high level design of adaptive systems with partial reconfiguration. FPT Kizheppatt Vipin, Suhaib A. Fahmy