Kishor Kunal - RankMe

25 papers A* 3A 6B 2Journal 9Unranked 5

Year	Rank	Type	Title / Venue / Authors
2025	A*	`conf`	INSTA: An Ultra-Fast, Differentiable, Statistical Static Timing Analysis Engine for Industrial Physical Design Applications. DAC Yi-Chen Lu, Zhizheng Guo, Kishor Kunal, Rongjian Liang, Haoxing Ren
2025	J	`jnl`	JARVIS: A Multi-Agent Code Assistant for High-Quality EDA Script Generation. CoRR Ghasem Pasandi, Kishor Kunal, Varun Tej, Kunjal Shan, Hanfei Sun, Sumit Jain, Chunhui Li, Chenhui Deng, Teodor-Dumitru Ene, Haoxing Ren, Sreedhar Pratty
2025	—	`conf`	LEGO-Size: LLM-Enhanced GPU-Optimized Signoff-Accurate Differentiable VLSI Gate Sizing in Advanced Nodes. ISPD Yi-Chen Lu, Kishor Kunal, Geraldo Pradipta, Rongjian Liang, Ravikishore Gandikota, Haoxing Ren
2024	J	`jnl`	Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design Coding Assistance. CoRR Amit Sharma, Teodor-Dumitru Ene, Kishor Kunal, Mingjie Liu, Zafar Hasan, Haoxing Ren
2024	B	`conf`	Automated synthesis of mixed-signal ML inference hardware under accuracy constraints. ASPDAC Kishor Kunal, Jitesh Poojary, S. Ramprasath, Ramesh Harjani, Sachin S. Sapatnekar
2024	A	`conf`	Generative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants. ICCAD Vidya A. Chhabria, Bing-Yue Wu, Utsav Sharma, Kishor Kunal, Austin Rovinski, Sachin S. Sapatnekar
2024	B	`conf`	Reinforcing the Connection between Analog Design and EDA (Invited Paper). ASPDAC Kishor Kunal, Meghna Madhusudan, Jitesh Poojary, S. Ramprasath, Arvind K. Sharma, Ramesh Harjani, Sachin S. Sapatnekar
2023	A	`conf`	A Multicore GNN Training Accelerator. ISLPED Sudipta Mondal, Ramprasath S, Ziqing Zeng, Kishor Kunal, Sachin S. Sapatnekar
2023	J	`jnl`	A Unified Engine for Accelerating GNN Weighting/Aggregation Operations, With Efficient Load Balancing and Graph-Specific Caching. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sudipta Mondal, Susmita Dey Manasi, Kishor Kunal, Ramprasath S, Ziqing Zeng, Sachin S. Sapatnekar
2023	J	`jnl`	ChipNeMo: Domain-Adapted LLMs for Chip Design. CoRR Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Ross Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, Kishor Kunal, Xiaowei Li, Hao Liu, Stuart F. Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P. Suthar, Varun Tej, Kaizhe Xu, Haoxing Ren
2023	J	`jnl`	GNN-Based Hierarchical Annotation for Analog Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar
2023	—	`conf`	Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology. ESSDERC Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Ramprasath S, Kishor Kunal, Sachin S. Sapatnekar, Ramesh Harjani
2022	A*	`conf`	GNNIE: GNN inference engine with load-balancing and graph-specific caching. DAC Sudipta Mondal, Susmita Dey Manasi, Kishor Kunal, Ramprasath S, Sachin S. Sapatnekar
2021	J	`jnl`	ALIGN: A System for Automating Analog Layout. IEEE Des. Test Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar
2021	A	`conf`	BeGAN: Power Grid Benchmark Generation Using a Process-portable GAN-based Methodology. ICCAD Vidya A. Chhabria, Kishor Kunal, Masoud Zabihi, Sachin S. Sapatnekar
2021	—	`conf`	Fast and Efficient Constraint Evaluation of Analog Layout Using Machine Learning Models. ASP-DAC Tonmoy Dhar, Jitesh Poojary, Yaguang Li, Kishor Kunal, Meghna Madhusudan, Arvind K. Sharma, Susmita Dey Manasi, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar
2021	J	`jnl`	GNNIE: GNN Inference Engine with Load-balancing and Graph-Specific Caching. CoRR Sudipta Mondal, Susmita Dey Manasi, Kishor Kunal, Sachin S. Sapatnekar
2021	—	`conf`	Machine Learning Techniques in Analog Layout Automation. ISPD Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar
2020	A	`conf`	A general approach for identifying hierarchical symmetry constraints for analog circuit layout. ICCAD Kishor Kunal, Jitesh Poojary, Tonmoy Dhar, Meghna Madhusudan, Ramesh Harjani, Sachin S. Sapatnekar
2020	J	`jnl`	A general approach for identifying hierarchical symmetry constraints for analog circuit layout. CoRR Kishor Kunal, Jitesh Poojary, Tonmoy Dhar, Meghna Madhusudan, Ramesh Harjani, Sachin S. Sapatnekar
2020	J	`jnl`	ALIGN: A System for Automating Analog Layout. CoRR Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Sachin S. Sapatnekar, Soner Yaldiz
2020	A	`conf`	GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits. DATE Kishor Kunal, Tonmoy Dhar, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Jiang Hu, Ramesh Harjani, Sachin S. Sapatnekar
2020	—	`conf`	Learning from Experience: Applying ML to Analog Circuit Design. ISPD Kishor Kunal, Tonmoy Dhar, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Sachin S. Sapatnekar
2020	A	`conf`	The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk). ICCAD Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar
2019	A*	`conf`	ALIGN: Open-Source Analog Layout Automation from the Ground Up. DAC Kishor Kunal, Meghna Madhusudan, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Sachin S. Sapatnekar