Kiran K. Gunnam

15 papers C 1Misc 4Journal 3Unranked 6
YearRankTypeTitle / Venue / Authors
2025 — conf
Adaptive Multi-Precision Inference for Large-Scale AI Using IEEE P3109 FP8.
ISVLSI
Arnav Ramamoorthy, Kiran K. Gunnam
2017 Misc conf
An efficient reconfigurable hardware accelerator for convolutional neural networks.
ACSSC
Anaam Ansari, Kiran K. Gunnam, Tokunbo Ogunfunmi
2013 Misc conf
Low latency T-EMS decoder for non-binary LDPC codes.
ACSSC
Erbao Li, Francisco Garcia-Herrero, David Declercq, Kiran K. Gunnam, Jesus Omar Lacruz, Javier Valls
2013 J jnl
Trellis-Based Extended Min-Sum Algorithm for Non-Binary LDPC Codes and its Hardware Structure.
IEEE Trans. Commun.
Erbao Li, David Declercq, Kiran K. Gunnam
2011 — conf
Trellis based Extended Min-Sum for decoding nonbinary LDPC codes.
ISWCS
Erbao Li, Kiran K. Gunnam, David Declercq
2009 J jnl
Comments on "Techniques and Architectures for Hazard-Free Semi-Parallel Decoding of LDPC Codes".
EURASIP J. Embed. Syst.
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary
2009 Misc conf
Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels.
VLSI Design
Weihuang Wang, Gwan S. Choi, Kiran K. Gunnam
2009 J jnl
Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels.
J. Low Power Electron.
Weihuang Wang, Euncheol Kim, Kiran K. Gunnam, Gwan S. Choi
2008 — conf
Next generation iterative LDPC solutions for magnetic recording storage.
ACSCC
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Shaohua Yang, Yuanxing Lee
2007 Misc conf
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes.
VLSI Design
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary
2007 C conf
Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard.
ISCAS
Kiran K. Gunnam, Gwan Choi, Weihuang Wang, Mark B. Yeary
2007 — conf
VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax.
ICC
Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Mohammed Atiquzzaman
2006 — —
Area and energy efficient VLSI architectures for low-density parity-check decoders using an on-the-fly computation.
Kiran K. Gunnam
2005 — conf
New optimizations for carrier synchronization in single carrier systems.
ICASSP (5)
Kiran K. Gunnam, Kanu Chadha, Mark Yeary
2004 — conf
An LDPC decoding schedule for memory access reduction.
ICASSP (5)
Kiran K. Gunnam, Gwan Choi, Mark Yeary