Kiichi Yamashita

15 papers C 4Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2026 C conf
A High-Resolution and High-Sensitivity CSRR Sensor Using a Q-Value Enhancement Circuit for Glucose Concentration Measurement.
ICCE
Shunya Watanabe, Yasuhiro Sugimoto, Kuniaki Kure, Hinata Ito, Kiichi Yamashita, Akira Yasuda
2024 C conf
A CSRR Glucose Concentration Sensor with Increased Resolution Using the Q-value Enhancement Circuit Technique.
ICCE
Uta Kobayashi, Yasuhiro Sugimoto, Koji Yoshimura, Kiichi Yamashita, Akira Yasuda
2024 C conf
A Complementary Split Ring Resonator Sensor Optimized for Maximizing the Dip and Q-value in S21 Frequency Characteristics.
ICCE
Koji Yoshimura, Yasuhiro Sugimoto, Uta Kobayashi, Kiichi Yamashita, Akira Yasuda
2023 — conf
Rewiring Effect of High Synchronization Edges in Complex Oscillator Networks.
ISOCC
Haruka Sakohira, Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio
2023 — conf
Synchoronization Penomena of Coupled Oscillators in Weighted Three-Dimensional Complex Networks.
ISOCC
Daiki Akai, Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio
2022 — conf
Synchronization Phenomena of Coupled Oscillators with Node and Edge Weights in Two-Dimensional Complex Networks.
ISOCC
Kiichi Yamashita, Yoko Uwate, Yoshifumi Nishio
2010 C conf
17 Gb/s VCSEL driver using double-pulse asymmetric emphasis technique in 90-nm CMOS for optical interconnection.
ISCAS
Kenichi Ohhata, Hironori Imamura, Toshinobu Ohno, Takaya Taniguchi, Kiichi Yamashita, Toru Yazaki, Norio Chujo
2009 J jnl
Design of a 770-MHz, 70-mW, 8-bit Subranging ADC Using Reference Voltage Precharging Architecture.
IEEE J. Solid State Circuits
Kenichi Ohhata, Koki Uchino, Yuichiro Shimizu, Kosuke Oyama, Kiichi Yamashita
2008 J jnl
Feedthrough reduction technique for track-and-hold circuit with body-bias control circuit.
IEICE Electron. Express
Kenichi Ohhata, Yuichiro Shimizu, Kiichi Yamashita
2008 J jnl
Sandwich Structure Type RF-MEMS Variable Capacitor with Low Voltage Controllability and Wide Tuning Range.
IEICE Trans. Commun.
Takuma Nishimoto, Kiichi Yamashita, Kenichi Ohhata
2007 J jnl
A 1-GHz, 56.3-dB SFDR CMOS track-and-hold circuit with body-bias control circuit.
IEICE Electron. Express
Kenichi Ohhata, Kosuke Yayama, Yuichiro Shimizu, Kiichi Yamashita
2006 J jnl
Design of Low-Noise, Low-Power 10-GHz VCO Using 0.18-µm CMOS Technology.
IEICE Trans. Electron.
Kenichi Ohhata, Katsuyoshi Harasawa, Makoto Honda, Kiichi Yamashita
1995 J jnl
Constant-current circuit-biasing technology for GaAs FET IC.
IEEE J. Solid State Circuits
Nobuo Kotera, Kiichi Yamashita, Keiichi Kitamura, Yasushi Hatta
1984 — conf
Instantaneous In-Service Fault Location Scheme For Digital Transmission Systems.
ICC (3)
Yoshitaka Takasaki, Kiichi Yamashita, Yasushi Takahashi, Yuji Nakano
1976 J jnl
Optical Pulse Formats for Fiber Optic Digital Communications.
IEEE Trans. Commun.
Yoshitaka Takasaki, Mitsuo Tanaka, Narimichi Maeda, Kiichi Yamashita, Katsuyuki Nagano