Kiamal Z. Pekmestzi

102 papers A* 1A 1B 1C 16Misc 2Journal 35Unranked 46

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Approximate Computing Survey, Part I: Terminology and Software & Hardware Approximation Techniques. ACM Comput. Surv. Vasileios Leon, Muhammad Abdullah Hanif, Giorgos Armeniakos, Xun Jiao, Muhammed Shafique, Kiamal Z. Pekmestzi, Dimitrios Soudris
2025	J	`jnl`	Approximate Computing Survey, Part II: Application-Specific & Architectural Approximation Techniques and Applications. ACM Comput. Surv. Vasileios Leon, Muhammad Abdullah Hanif, Giorgos Armeniakos, Xun Jiao, Muhammad Shafique, Kiamal Z. Pekmestzi, Dimitrios Soudris
2025	J	`jnl`	MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware Accelerators. CoRR Vasileios Leon, Georgios Makris, Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris
2023	J	`jnl`	Approximate Computing Survey, Part I: Terminology and Software & Hardware Approximation Techniques. CoRR Vasileios Leon, Muhammad Abdullah Hanif, Giorgos Armeniakos, Xun Jiao, Muhammad Shafique, Kiamal Z. Pekmestzi, Dimitrios Soudris
2023	J	`jnl`	Approximate Computing Survey, Part II: Application-Specific & Architectural Approximation Techniques and Applications. CoRR Vasileios Leon, Muhammad Abdullah Hanif, Giorgos Armeniakos, Xun Jiao, Muhammad Shafique, Kiamal Z. Pekmestzi, Dimitrios Soudris
2022	—	`conf`	MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware Accelerators. LASCAS Vasileios Leon, Georgios Makris, Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris
2022	C	`conf`	Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs. VLSI-SoC Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris
2021	B	`conf`	Exploiting the Potential of Approximate Arithmetic in DSP & AI Hardware Accelerators. FPL Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris
2021	J	`jnl`	Improving Power of DSP and CNN Hardware Accelerators Using Approximate Floating-point Multipliers. ACM Trans. Embed. Comput. Syst. Vasileios Leon, Theodora Paparouni, Evangelos Petrongonas, Dimitrios Soudris, Kiamal Z. Pekmestzi
2020	—	`conf`	Combining Arithmetic Approximation Techniques for Improved CNN Circuit Design. ICECS George Lentaris, George Chatzitsompanis, Vasileios Leon, Kiamal Z. Pekmestzi, Dimitrios Soudris
2020	J	`jnl`	Efficient design of magnitude and 2's complement comparators. Integr. Fotios Ntouskas, Constantinos Efstathiou, Kiamal Z. Pekmestzi
2020	J	`jnl`	On the Diminished-1 Modulo 2n+1 Addition and Subtraction. J. Circuits Syst. Comput. Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos
2019	A*	`conf`	Cooperative Arithmetic-Aware Approximation Techniques for Energy-Efficient Multipliers. DAC Vasileios Leon, Konstantinos Asimakopoulos, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2019	J	`jnl`	Energy-efficient VLSI implementation of multipliers with double LSB operands. IET Circuits Devices Syst. Vasileios Leon, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2019	J	`jnl`	Multi-Level Approximate Accelerator Synthesis Under Voltage Island Constraints. IEEE Trans. Circuits Syst. II Express Briefs Georgios Zervakis, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2019	—	`conf`	TF2FPGA: A Framework for Projecting and Accelerating Tensorflow CNNs on FPGA Platforms. MOCAST Spyridon Mouselinos, Vasileios Leon, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2018	J	`jnl`	Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers. IEEE Trans. Very Large Scale Integr. Syst. Vasileios Leon, Georgios Zervakis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2018	—	`conf`	Efficient support vector machines implementation on Intel/Movidius Myriad 2. MOCAST Charalampos Marantos, Nikolaos Karavalakis, Vasileios Leon, Vasileios Tsoutsouras, Kiamal Z. Pekmestzi, Dimitrios Soudris
2018	J	`jnl`	VOSsim: A Framework for Enabling Fast Voltage Overscaling Simulation for Approximate Computing Circuits. IEEE Trans. Very Large Scale Integr. Syst. Georgios Zervakis, Fotios Ntouskas, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2018	J	`jnl`	Walking through the Energy-Error Pareto Frontier of Approximate Multipliers. IEEE Micro Vasileios Leon, Georgios Zervakis, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2017	J	`jnl`	DIRT latch: A novel low cost double node upset tolerant latch. Microelectron. Reliab. Nikolaos Eftaxiopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
2017	—	`conf`	On the design of the FFT Butterfly Units. MOCAST Fotis Douskas, Kiamal Z. Pekmestzi
2016	C	`conf`	Design of Efficient 1's Complement Modified Booth Multiplier. DSD Kiamal Z. Pekmestzi, Constantinos Efstathiou
2016	J	`jnl`	Design-Efficient Approximate Multiplication Circuits Through Partial Product Perforation. IEEE Trans. Very Large Scale Integr. Syst. Georgios Zervakis, Kostas Tsoumanis, Sotirios Xydis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2016	J	`jnl`	Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. Kostas Tsoumanis, Sotirios Xydis, Georgios Zervakis, Kiamal Z. Pekmestzi
2016	—	`conf`	Fused modulo 2n + 1 add-multiply unit for weighted operands. DTIS Kiamal Z. Pekmestzi, Kostas Tsoumanis, Constantinos Efstathiou
2016	J	`jnl`	Low latency radiation tolerant self-repair reconfigurable SRAM architecture. Microelectron. Reliab. Nikolaos Eftaxiopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
2016	J	`jnl`	Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Signed-Digit Encoding. IEEE Trans. Computers Kostas Tsoumanis, Nicholas Axelos, Nikolaos Moschopoulos, Georgios Zervakis, Kiamal Z. Pekmestzi
2015	—	`conf`	Approximate Multiplier Architectures Through Partial Product Perforation: Power-Area Tradeoffs Analysis. ACM Great Lakes Symposium on VLSI Georgios Zervakis, Kostas Tsoumanis, Sotirios Xydis, Nicholas Axelos, Kiamal Z. Pekmestzi
2015	—	`conf`	DONUT: A Double Node Upset Tolerant Latch. ISVLSI Nikolaos Eftaxiopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
2015	—	`conf`	Delta DICE: A Double Node Upset resilient latch. MWSCAS Nikolaos Eftaxiopoulos, Nicholas Axelos, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
2015	A	`conf`	Hybrid approximate multiplier architectures for improved power-accuracy trade-offs. ISLPED Georgios Zervakis, Sotirios Xydis, Kostas Tsoumanis, Dimitrios Soudris, Kiamal Z. Pekmestzi
2015	C	`conf`	Low leakage radiation tolerant CAM/TCAM cell. IOLTS Nikolaos Eftaxiopoulos-Sarris, Nicholas Axelos, Kiamal Z. Pekmestzi
2015	—	`conf`	Modulo 2n ± 1 Fused Add-Multiply Units. ISVLSI Constantinos Efstathiou, Kostas Tsoumanis, Kiamal Z. Pekmestzi, Ioannis Voyiatzis
2014	—	`conf`	A high radix montgomery multiplier with concurrent error detection. IDT Georgios Zervakis, Nikolaos Eftaxiopoulos-Sarris, Kostas Tsoumanis, Nicholas Axelos, Kiamal Z. Pekmestzi
2014	—	`conf`	A segmentation-based BISR scheme. ASP-DAC Georgios Zervakis, Nikolaos Eftaxiopoulos-Sarris, Kostas Tsoumanis, Nicholas Axelos, Kiamal Z. Pekmestzi
2014	J	`jnl`	An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator. IEEE Trans. Circuits Syst. I Regul. Pap. Kostas Tsoumanis, Sotirios Xydis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi
2014	—	`conf`	An independent dual gate SOI FinFET soft-error resilient memory cell. IDT Nikolaos Eftaxiopoulos-Sarris, Nicholas Axelos, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
2014	J	`jnl`	Efficient modulo 2 Integr. Constantinos Efstathiou, Nikos K. Moshopoulos, Nicholas Axelos, Kiamal Z. Pekmestzi
2014	C	`conf`	FF-DICE: An 8T soft-error tolerant cell using Independent Dual Gate SOI FinFETs. IOLTS Nicholas Axelos, Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
2014	—	`conf`	Fused modulo 2 ICECS Kostas Tsoumanis, Kiamal Z. Pekmestzi, Constantinos Efstathiou
2014	—	`conf`	High performance MAC designs. IDT Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kiamal Z. Pekmestzi, Costas Efstathiou
2014	—	`conf`	Modulo 2 IDT Kostas Tsoumanis, Constantinos Efstathiou, Kiamal Z. Pekmestzi
2014	—	`conf`	On the design of efficient modulo 2 DTIS Constantinos Efstathiou, Kostas Tsoumanis, Kiamal Z. Pekmestzi, Ioannis Voyiatzis
2013	J	`jnl`	A column parity based fault detection mechanism for FIFO buffers. Integr. Isidoros Sideris, Kiamal Z. Pekmestzi
2013	C	`conf`	A radiation tolerant and self-repair memory cell. IOLTS Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
2013	—	`conf`	Efficient modulo 2 ACM Great Lakes Symposium on VLSI Kiamal Z. Pekmestzi, Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis
2013	C	`conf`	On the design of modulo 2 VLSI-SoC Kostas Tsoumanis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi
2013	J	`jnl`	On the design of modulo 2 Comput. Electr. Eng. Costas Efstathiou, Nikolaos Moschopoulos, Ioannis Voyiatzis, Kiamal Z. Pekmestzi
2012	J	`jnl`	Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs. ACM Trans. Design Autom. Electr. Syst. Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
2012	J	`jnl`	Cost Effective Protection Techniques for TCAM Memory Arrays. IEEE Trans. Computers Isidoros Sideris, Kiamal Z. Pekmestzi
2012	J	`jnl`	Efficient Memory Repair Using Cache-Based Redundancy. IEEE Trans. Very Large Scale Integr. Syst. Nicholas Axelos, Kiamal Z. Pekmestzi, Dimitris Gizopoulos
2012	C	`conf`	On the Design of Configurable Modulo 2n±1 Residue Generators. DSD Constantinos Efstathiou, Nikolaos Moschopoulos, Kostas Tsoumanis, Kiamal Z. Pekmestzi
2011	J	`jnl`	High Performance and Area Efficient Flexible DSP Datapath Synthesis. IEEE Trans. Very Large Scale Integr. Syst. Sotirios Xydis, George Economakos, Dimitrios Soudris, Kiamal Z. Pekmestzi
2011	C	`conf`	On the Design of Modulo 2^n+1 Multipliers. DSD Constantinos Efstathiou, Kiamal Z. Pekmestzi, Nicholas Axelos
2010	—	`conf`	A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning. ISVLSI (Selected papers) Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
2010	—	`conf`	A New Low-Power Soft-Error Tolerant SRAM Cell. ISVLSI Nicholas Axelos, Kiamal Z. Pekmestzi, Nikolaos Moschopoulos
2010	—	`conf`	A Temperature-Aware Time-Dependent Dielectric Breakdown Analysis Framework. PATMOS Dimitris Bekiaris, Antonis Papanikolaou, Christos Papameletis, Dimitrios Soudris, George Economakos, Kiamal Z. Pekmestzi
2010	C	`conf`	A bit level area aware cache-based architecture for memory repairs. IOLTS Nicholas Axelos, Kiamal Z. Pekmestzi
2010	Misc	`conf`	A fast multiplier-less edge detection accelerator for FPGAs. SAC Nikos Anastasiadis, Isidoros Sideris, Kiamal Z. Pekmestzi
2010	Misc	`conf`	A hardware peripheral for Java bytecodes translation acceleration. SAC Isidoros Sideris, Nikos K. Moshopoulos, Kiamal Z. Pekmestzi
2010	—	`conf`	Custom multi-threaded Dynamic Memory Management for Multiprocessor System-on-Chip platforms. ICSAMOS Sotirios Xydis, Alexandros Bartzas, Iraklis Anagnostopoulos, Dimitrios Soudris, Kiamal Z. Pekmestzi
2010	C	`conf`	Designing efficient DSP datapaths through compiler-in-the-loop exploration methodology. ISCAS Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
2010	—	`conf`	Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching. ISVLSI Sotirios Xydis, Christos Skouroumounis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
2010	—	`conf`	High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures. ISVLSI Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos
2009	—	`conf`	A design methodology for high-performance and low-leakage fixed-point transpose FIR filters. ICECS Dimitris Bekiaris, Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
2009	J	`jnl`	Designing coarse-grain reconfigurable architectures by inlining flexibility into custom arithmetic data-paths. Integr. Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
2009	J	`jnl`	Extending an embedded RISC microprocessor for efficient translation based Java execution. Microprocess. Microsystems Isidoros Sideris, Kiamal Z. Pekmestzi, George Economakos
2009	—	`conf`	Flexible Datapath Synthesis through Arithmetically Optimized Operation Chaining. AHS Sotirios Xydis, Ioannis Triantafyllou, George Economakos, Kiamal Z. Pekmestzi
2008	C	`conf`	A BISR Architecture for Embedded Memories. IOLTS Kiamal Z. Pekmestzi, Nicholas Axelos, Isidoros Sideris, Nikos K. Moshopoulos
2008	—	`conf`	A flexible architecture for DSP applications combining high performance arithmetic with small scale configurability. EUSIPCO Sotirios Xydis, Isidoros Sideris, George Economakos, Kiamal Z. Pekmestzi
2008	—	`conf`	A high-speed radix-4 multiplexer-based array multiplier. ACM Great Lakes Symposium on VLSI Dimitris Bekiaris, Kiamal Z. Pekmestzi, Christos A. Papachristou
2008	J	`jnl`	A predecoding technique for ILP exploitation in Java processors. J. Syst. Archit. Isidoros Sideris, Kiamal Z. Pekmestzi, George Economakos
2008	—	`conf`	An instruction set extension for java bytecodes translation acceleration. ICSAMOS Isidoros Sideris, Kiamal Z. Pekmestzi, George Economakos
2008	—	`conf`	Efficient serial and parallel implementation of programmable fir filters based on the merging technique. EUSIPCO Dimitris Bekiaris, George Economakos, Kiamal Z. Pekmestzi
2008	—	`conf`	Mapping DSP Applications onto High-Performance Architectural Templates with Inlined Flexibility. AHS Sotirios Xydis, George Economakos, Dimitrios Soudris, Kiamal Z. Pekmestzi
2007	—	`conf`	A Reconfigurable Arithmetic Data-path Based On Regular Interconnection. AHS Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
2007	—	`conf`	A regular interconnection scheme for efficient mapping of DSP kernels into reconfigurable hardware. EUSIPCO Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
2007	C	`conf`	An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding. IOLTS Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi
2007	—	`conf`	Building embedded DSP applications in a Java modeling framework. EUSIPCO Isidoros Sideris, Dimitris Pilitsos, George Economakos, Kiamal Z. Pekmestzi
2007	—	`conf`	Flexibility Inlining into Arithmetic Data-paths Exploiting A Regular Interconnection Scheme. ICSAMOS Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi
2007	—	`conf`	Power-Efficient and Low Latency Implementation of Programmable FIR filters Using Carry-Save Arithmetic. ICECS Dimitris Bekiaris, Isidoros Sideris, George Economakos, Kiamal Z. Pekmestzi
2006	—	`conf`	A Large Scale Adaptable Multiplier for Cryptographic Applications. AHS Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi
2006	—	`conf`	A cache based stack folding technique for high performance Java processors. JTRES Isidoros Sideris, George Economakos, Kiamal Z. Pekmestzi
2006	C	`conf`	FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems. ICCD Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi
2006	C	`conf`	Segmentation based design of serial parallel multipliers. ISCAS Paul Bougas, Andreas Tsirikos, Kostas Anagnostopoulos, Isidoros Sideris, Kiamal Z. Pekmestzi
2005	—	`conf`	100% operational efficient bit-serial programmable FIR digital filters. EUSIPCO Paraskevas Kalivas, Andreas Tsirikos, Paul Bougas, Kiamal Z. Pekmestzi
2005	J	`jnl`	A New Low Latency Parallel FIR Filter Scheme. J. VLSI Signal Process. Paraskevas Kalivas, Vassilis Vassilakis, Chris Meletis, Kiamal Z. Pekmestzi
2005	C	`conf`	Long Number Bit-Serial Squarers. IEEE Symposium on Computer Arithmetic E. Chaniotakis, Paraskevas Kalivas, Kiamal Z. Pekmestzi
2005	—	`conf`	Novel systolic schemes for serial-parallel multiplication. EUSIPCO Isidoros Sideris, Kostas Anagnostopoulos, Paraskevas Kalivas, Kiamal Z. Pekmestzi
2005	J	`jnl`	Pipelined array-based FIR filter folding. IEEE Trans. Circuits Syst. I Regul. Pap. Paul Bougas, Paraskevas Kalivas, Andreas Tsirikos, Kiamal Z. Pekmestzi
2004	—	`conf`	Low-latency and high-efficiency bit serial-serial multipliers. EUSIPCO Paraskevas Kalivas, Kiamal Z. Pekmestzi, Paul Bougas, Andreas Tsirikos, Kostas Gotsis
2004	—	`conf`	Pipeline array implementation of FIR filters. EUSIPCO Paraskevas Kalivas, Paul Bougas, Vassilis Vassilakis, Christos Meletis, Kiamal Z. Pekmestzi
2002	J	`jnl`	A Systolic, High Speed Architecture for an RSA Cryptosystem. J. VLSI Signal Process. Kiamal Z. Pekmestzi, Nikos K. Moshopoulos
2001	—	`conf`	A Novel Systolic Architecture for Efficient RSA Implementation. Public Key Cryptography Nikos K. Moshopoulos, Kiamal Z. Pekmestzi
2001	J	`jnl`	A bit-interleaved systolic architecture for a high-speed RSA system. Integr. Kiamal Z. Pekmestzi, Nikos K. Moshopoulos
2001	C	`conf`	On the Hardware Implementation of the 3GPP Confidentiality and Integrity Algorithms. ISC Kostas Marinis, Nikos K. Moshopoulos, Fotis Karoubalis, Kiamal Z. Pekmestzi
2000	—	`conf`	A systolic serial squarer of continuous operation. EUSIPCO Kiamal Z. Pekmestzi, Nikolaos Moshopoulos, Paraskevas Kalivas
2000	J	`jnl`	Constant Number Serial Pipeline Multipliers. J. VLSI Signal Process. Kiamal Z. Pekmestzi, Paraskevas Kalivas
1998	—	`conf`	A scheme for the VLSI implementation of FIR digital filters with reduced latency. EUSIPCO Christos Gr. Caraiscos, Kiamal Z. Pekmestzi
1997	—	`conf`	Hardware compilation using attribute grammars. CHARME George Economakos, George K. Papakonstantinou, Kiamal Z. Pekmestzi, Panayotis Tsanakas
1996	J	`jnl`	Systolic digital filters with reduced latency - serial implementation. Int. J. Circuit Theory Appl. Christos Gr. Caraiscos, Kiamal Z. Pekmestzi