Kent Edrian Lozada

14 papers Journal 6Unranked 8
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 12-Bit 600-MS/s Pipelined ADC With Two-Stage High-Gain Dynamic Amplifier in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bo Gao, Raymond Mabilangan, Chang-Un Park, Kent Edrian Lozada, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2026 J jnl
A SAR-Assisted Continuous-Time M-0 MASH Delta-Sigma Modulator With Digital-Domain Noise Leakage Shaping.
IEEE Open J. Circuits Syst.
Kent Edrian Lozada, Bo Gao, Raymond Mabilangan, Charlie Tahar, Kun-Woo Park, Young-Hun Moon, Kwan-Hoon Song, Seung-Tak Ryu
2025 J jnl
A 0.38-mW 200-kHz-BW Digital-Intensive Single-Opamp Fourth-Order Continuous-Time Delta-Sigma Modulator With Third-Order Digital Noise Coupling in 28-nm CMOS.
IEEE J. Solid State Circuits
Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2025 — conf
Continuous-Time Delta-Sigma Modulator with SAR-Assisted Digital Noise Coupling.
CICC
Kent Edrian Lozada, Il-Hoon Jang, Ye-Dam Kim, Seung-Tak Ryu
2024 — conf
A 0.38mW 200kHz-BW 92.1dB-DR Single-Opamp 4th-Order Continuous-Time Delta-Sigma Modulator with 3
VLSI Technology and Circuits
Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
A 100kHz-BW 99dB-DR Continuous-Time Tracking-Zoom Incremental ADC with Residue-Gain Switching and Digital NC-FF.
VLSI Technology and Circuits
Ye-Dam Kim, Jae-Hyun Chung, Kent Edrian Lozada, Chang-Un Park, Kun-Woo Park, Kwan-Hoon Song, Young-Hun Moon, Min-Jae Seo, Seung-Tak Ryu
2024 J jnl
A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta-Sigma Modulator With Digital Noise Coupling.
IEEE J. Solid State Circuits
Dong-Hun Lee, Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
A 28nm CMOS 12-bit-600-MS/s 15.6mW Pipelined ADC with Two-Stage Gainboosting FIA-based RA.
A-SSCC
Bo Gao, Lizhen Zhang, Raymond Mabilangan, Chang-Un Park, Kent Edrian Lozada, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
A 5× OSR 1MHz-BW 81dB-SNDR 5
A-SSCC
Lizhen Zhang, Bo Gao, Kun-Woo Park, Hyeongjin Kim, Kent Edrian Lozada, Ye-Dam Kim, Jianhui Wu, Seung-Tak Ryu
2024 J jnl
DR Loss-Free Dithering-Based Digital Background Linearity Calibration for SAR-Assisted Multi-Stage ADCs With Digital Input-Interference Cancellation.
IEEE Open J. Circuits Syst.
Lizhen Zhang, Bo Gao, Kun-Woo Park, Kent Edrian Lozada, Raymond Mabilangan, Hyeongjin Kim, Jianhui Wu, Seung-Tak Ryu
2024 — conf
TID-Tolerant StrongARM Comparator and Sampling Network for Satellite Application High-Voltage ADCs.
A-SSCC
Charlie Tahar, Changyeop Lee, Kun-Woo Park, Kent Edrian Lozada, Hyojun Kim, Ki-Ho Kwon, Seung-Tak Ryu
2023 — conf
A 25kHz-BW 97.4dB-SNDR 100.2dB-DR 3
A-SSCC
Kent Edrian Lozada, Dong-Hun Lee, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2022 J jnl
A 4
IEEE Trans. Circuits Syst. II Express Briefs
Kent Edrian Lozada, Il-Hoon Jang, Gyeom-Je Bae, Dong-Hun Lee, Ye-Dam Kim, Hankyu Lee, Seong Joong Kim, Seung-Tak Ryu
2021 — conf
A 4th-order CT I-DSM with Digital Noise Coupling and Input Pre-conversion Method for Initialization.
A-SSCC
Ye-Dam Kim, Jae-Hyun Chung, Kent Edrian Lozada, Dong-Jin Chang, Seung-Tak Ryu