Kenji Toda

32 papers A* 2A 2B 7Misc 2Journal 9Unranked 10
YearRankTypeTitle / Venue / Authors
2014 J jnl
Synthesis and Photoluminescence Properties of HEu
IEICE Trans. Electron.
Mizuki Watanabe, Kazuyoshi Uematsu, Sun Woog Kim, Kenji Toda, Mineo Sato
2013 J jnl
Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption.
IEICE Trans. Inf. Syst.
Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda, Akashi Satoh
2011 J jnl
Crystal Growth of Silicate Phosphors from the Vapor Phase.
IEICE Trans. Electron.
Tadashi Ishigaki, Kenji Toda, Tatsuya Sakamoto, Kazuyoshi Uematsu, Mineo Sato
2008 J jnl
A Secure Content Delivery System Based on a Partially Reconfigurable FPGA.
IEICE Trans. Inf. Syst.
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda
2008 Misc conf
Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems.
IWSEC
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda
2008 B conf
Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems.
FPL
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda
2007 — conf
A Secure Digital Content Delivery System Based on Partially Reconfigurable Hardware.
FPT
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda
2007 J jnl
FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet.
IEICE Trans. Inf. Syst.
Toshihiro Katashita, Yoshinori Yamaguchi, Atusi Maeda, Kenji Toda
2006 B conf
A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection.
FPL
Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi
2006 Misc conf
Highly Efficient String Matching Circuit for IDS with FPGA.
FCCM
Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi
2006 J jnl
New Silicate Phosphors for a White LED.
IEICE Trans. Electron.
Kenji Toda, Yoshitaka Kawakami, Shin-ichiro Kousaka, Yutaka Ito, Akira Komeno, Kazuyoshi Uematsu, Mineo Sato
2006 B conf
Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration.
FPL
Yohei Hori, Hiroyuki Yokoyama, Kenji Toda
2005 — conf
Dynamic Load Balancing Using Network Transferable Computer.
ICDCS Workshops
Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki
2005 B conf
FPGA-Based Content Protection System for Embedded Consumer Electronics.
RTCSA
Hiroyuki Yokoyama, Kenji Toda
2004 — conf
A tsume-shogi processor based on reconfigurable hardware.
FPT
Yohei Hori, Tsutomu Maruyama, Kenji Toda
2003 — conf
Adaptable Load Balancing Using Network Transferable Computer Associated with Mobile IP.
ICDCS Workshops
Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki
2000 B conf
A Flexible Scheduling for Automobile Control Using Imprecise Computation and Its Fundamental Evaluation.
ICECCS
Fuminori Nakanishi, Shinnya Hiraike, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda
1999 J jnl
Real-world applications of analog and digital evolvable hardware .
IEEE Trans. Evol. Comput.
Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu
1998 A* conf
Automation of Chamfering by an industrial Robot, for the Case of Machined Hole on a Cylindrical Workpiece.
ICRA
Naoki Asakawa, Kenji Toda, Yoshimi Takeuchi
1997 B conf
CODA-R: a reconfigurable testbed for real-time parallel computation.
RTCSA
Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi
1995 B conf
Performance comparison of real-time architectures using simulation.
RTCSA
Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi
1994 A conf
A Priority Forwarding Router Chip for Real-Time Interconnection Networks.
RTSS
Kenji Toda, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi
1994 — conf
The Execution Model and the Architecture for Real-Time Parallel Systems.
IFIP Congress (1)
Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi
1993 — conf
The Hardware Architecture of the CODA Real-Time Parallel Processor.
PARCO
Kenji Nishida, Kenji Toda, Toshio Shimada, Yoshinori Yamaguchi
1992 A conf
A priority forwarding scheme for real-time multistage interconnection networks.
RTSS
Kenji Toda, Kenji Nishida, Shuichi Sakai, Toshio Shimada
1992 J jnl
Real-Time Parallel Architecture for Sensor Funsion.
J. Parallel Distributed Comput.
Toshio Shimada, Kenji Toda, Kenji Nishida
1991 — conf
Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism.
IPPS
Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada
1990 J jnl
Evaluation of a Data-Driven Machine with Advanced Control Mechanism.
Syst. Comput. Jpn.
Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba
1989 — conf
The Gene Concept and its Implementation for a Dataflow Schemed Parallel Computer.
PARLE (1)
Kenji Toda, Yoshinobu Uchibori, Toshitsugu Yuba
1986 — conf
DBCL: Data-Flow Computing Base Language with n-Value Logic.
FJCC
Jayantha A. Herath, Nobuo Saito, Kenji Toda, Yoshinori Yamaguchi, Toshitsugu Yuba
1984 — conf
EM-3: A Lisp-Based Data-Driven Machine.
FGCS
Yoshinori Yamaguchi, Kenji Toda, Jayantha A. Herath, Toshitsugu Yuba
1983 A* conf
A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3)
ISCA
Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba