Kenji Kawai

12 papers Journal 7Unranked 5
YearRankTypeTitle / Venue / Authors
2022 J jnl
Tectonism of Late Noachian Mars: Surface Signatures from the Southern Highlands.
Remote. Sens.
Trishit Ruj, Goro Komatsu, Gene Schmidt, Suniti Karunatillake, Kenji Kawai
2015 — conf
Data transmission scheme for enhancing effective downlink bandwidth in 5G mobile fronthaul with TDM-PON.
ECOC
Hiroyuki Uzawa, Yuki Arikawa, Kenji Kawai, Satoshi Shigematsu
2015 — conf
Practical resource scheduling in massive-cell deployment for 5G mobile communications systems.
ISPACS
Yuki Arikawa, Kenji Kawai, Hiroyuki Uzawa, Satoshi Shigematsu
2011 J jnl
Population-averaged standard template brain atlas for the common marmoset (Callithrix jacchus).
NeuroImage
Keigo Hikishima, M. M. Quallo, Yuki Komaki, Masayuki Yamada, Kenji Kawai, Suketaka Momoshima, Hirotaka James Okano, Erika Sasaki, N. Tamaoki, R. N. Lemon, Atsushi Iriki, Hideyuki Okano
2010 — conf
A 2Gb/s network processor with a 24mW IPsec offload for residential gateways.
ISSCC
Yukikuni Nishida, Kenji Kawai, Keiichi Koike
2005 J jnl
Physical Layer OAM&P Signaling Method for 10 Gbit/s Ethernet Transport over Optical Networks.
IEICE Trans. Commun.
Kazuhiko Terada, Kenji Kawai, Osamu Ishida, Keiji Kishine, Noboru Iwasaki, Haruhiko Ichino
2000 J jnl
A 0.6-W 10-Gb/s SONET/SDH bit-error-rate monitoring LSI.
IEEE J. Solid State Circuits
Kenji Kawai, Haruhiko Ichino
2000 J jnl
Robust photonic transport network implementation with optical cross-connect systems.
IEEE Commun. Mag.
Satoru Okamoto, Masafumi Koga, Hiro Suzuki, Kenji Kawai
1999 J jnl
A 557-mW, 2.5-Gbit/s SONET/SDH regenerator-section terminating LSI chip using low-power bipolar-LSI design.
IEEE J. Solid State Circuits
Kenji Kawai, Keiichi Koike, Yuichiro Takei, Akira Onozawa, Hitoshi Obara, Haruhiko Ichino
1998 J jnl
High-speed, low-power, bipolar standard cell design methodology for Gbit/s signal processing.
IEEE J. Solid State Circuits
Keiichi Koike, Kenji Kawai, Akira Onozawa, Yuichiro Takei, Yoshiji Kobayashi, Haruhiko Ichino
1997 — conf
An Efficient Paired-net Routing Algorithm for High-speed Bipolar LSIs.
Great Lakes Symposium on VLSI
Yuichiro Takei, Akira Onozawa, Kenji Kawai, Hitoshi Kitazawa
1995 — conf
Post-layout optimization of power and timing for ECL LSIs.
ED&TC
Akira Onozawa, Hitoshi Kitazawa, Kenji Kawai