Kengo Iokibe

11 papers Misc 1Journal 8Unranked 2
YearRankTypeTitle / Venue / Authors
2025 J jnl
Investigation of Relationship between Learning Amount and Interval Solution Range in Multi-Objective Optimal Design Using ANN Model.
IEICE Trans. Commun.
Shohei Kan, Masaki Himuro, Ryo Maekawa, Kengo Iokibe, Yoshitaka Toyota
2024 J jnl
Identification of Dominant Side-Channel Information Leaking Mechanism Induced by Split Ground Planes.
IEICE Trans. Commun.
Kengo Iokibe, Kohei Shimoda, Masaki Himuro, Yoshitaka Toyota
2021 J jnl
Evaluation of Side-Channel Leakage Simulation by Using EMC Macro-Model of Cryptographic Devices.
IEICE Trans. Commun.
Yusuke Yano, Kengo Iokibe, Toshiaki Teshima, Yoshitaka Toyota, Toshihiro Katashita, Yohei Hori
2021 J jnl
Practical Design Methodology of Mode-Conversion-Free Tightly Coupled Asymmetrically Tapered Bend for High-Density Differential Wiring.
IEICE Trans. Commun.
Chenyu Wang, Kengo Iokibe, Yoshitaka Toyota
2020 — conf
An Approach for Attacking Speck on Microcontroller with Correlation Power Analysis.
CANDAR (Workshops)
Jianjie Tang, Kengo Iokibe, Takuya Kusaka, Yasuyuki Nogami
2020 J jnl
Mitigating differential skew by rotating meshed ground for high-density layout in flexible printed circuits.
IEICE Electron. Express
Chenyu Wang, Kengo Iokibe, Yoshitaka Toyota
2016 J jnl
Connector Model for Use in Common-Mode Antenna Model Used to Estimate Radiation from Printed Circuit Boards with Board-to-Board Connector.
IEICE Trans. Commun.
Yuri Wakaduki, Tetsushi Watanabe, Yoshitaka Toyota, Kengo Iokibe, Liuji R. Koga, Osami Wada
2016 J jnl
FPGA Implementation of Various Elliptic Curve Pairings over Odd Characteristic Field with Non Supersingular Curves.
IEICE Trans. Inf. Syst.
Yasuyuki Nogami, Hiroto Kagotani, Kengo Iokibe, Hiroyuki Miyatake, Takashi Narita
2015 J jnl
Suppression of Mode Conversion by Using Tightly Coupled Asymmetrically Tapered Bend in Differential Lines.
IEICE Trans. Commun.
Yoshitaka Toyota, Shohei Kan, Kengo Iokibe
2013 — conf
Estimation of data-dependent power voltage variations of FPGA by equivalent circuit modeling from on-board measurements.
EMC Compo
Kengo Iokibe, Yoshitaka Toyota
2012 Misc conf
Very Short Critical Path Implementation of AES with Direct Logic Gates.
IWSEC
Kenta Nekado, Yasuyuki Nogami, Kengo Iokibe