| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2011 | J | jnl |
IET Comput. Digit. Tech.
|
| 2011 | — | ed. |
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, Lausanne, Switzerland, May 2-6, 2011
ACM Great Lakes Symposium on VLSI
|
| 2009 | C | conf |
ICCD
|
| 2007 | J | jnl |
IEEE Des. Test Comput.
|
| 2005 | — | conf |
FMGALS@MEMOCODE
|
| 2003 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2002 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2002 | — | conf |
ASYNC
|
| 2000 | — | conf |
ASYNC
|
| 2000 | — | conf |
Asian Test Symposium
|
| 1999 | A* | conf |
DAC
|
| 1999 | — | conf |
ASYNC
|
| 1999 | — | conf |
ASYNC
|
| 1999 | A | conf |
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions.
ICCAD
|
| 1998 | — | conf |
ASYNC
|