Keisuke Sugiura

34 papers C 3Misc 1Journal 21Unranked 9

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A Sub-Microsecond HuffYUV-Based FPGA Accelerator for Real-Time Video Compression over High-Bandwidth Networks. CCNC Takeo Kurosawa, Keisuke Sugiura, Yoshiki Yamaguchi, Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa
2026	Misc	`conf`	Low-Latency Streaming for Immersive Remote Interaction with a Spherical Display. ICNC Den Tabata, Taiga Kobori, Keisuke Sugiura, Yoshiki Yamaguchi, Ryouhei Tsugami, Toshihito Fujiwara, Tatsuya Fukui, Satoshi Narikawa
2025	J	`jnl`	ElasticZO: A Memory-Efficient On-Device Learning with Combined Zeroth- and First-Order Optimization. CoRR Keisuke Sugiura, Hiroki Matsutani
2025	J	`jnl`	FPGA-accelerated Correspondence-free Point Cloud Registration with PointNet Features. ACM Trans. Reconfigurable Technol. Syst. Keisuke Sugiura, Hiroki Matsutani
2025	J	`jnl`	InstantFT: An FPGA-Based Runtime Subsecond Fine-tuning of CNN Models. CoRR Keisuke Sugiura, Hiroki Matsutani
2025	C	`conf`	Marker-Based Recognition for Autonomous Micro-Drone Flight: An FPGA-Optimized Feasibility Study. VLSI-SoC Diego Marcelo Ramirez Jove, Keisuke Sugiura, Yoshiki Yamaguchi
2025	—	`conf`	Performance Comparison for CPU, FPGA, and GPU in CRS Format Conversion Processing. MCSoC Tomoya Yokono, Keisuke Sugiura, Yoshiki Yamaguchi
2025	J	`jnl`	Performance and Power-Efficiency Improvements on Graph Embedding Using Sequential Training Algorithm and FPGA. IEICE Trans. Inf. Syst. Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani
2025	J	`jnl`	PointODE: Lightweight Point Cloud Learning with Neural Ordinary Differential Equations on Edge. CoRR Keisuke Sugiura, Mizuki Yasuda, Hiroki Matsutani
2024	J	`jnl`	A Cost-Efficient FPGA Implementation of Tiny Transformer Model using Neural ODE. CoRR Ikumi Okubo, Keisuke Sugiura, Hiroki Matsutani
2024	J	`jnl`	A Cost-Efficient FPGA-Based CNN-Transformer Using Neural ODE. IEEE Access Ikumi Okubo, Keisuke Sugiura, Hiroki Matsutani
2024	—	`conf`	A Scalable Secure Fault Tolerant Aggregation for P2P Federated Learning. IPDPS (Workshops) Yujiro Yahata, Keisuke Sugiura, Hiroki Matsutani
2024	—	`conf`	An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm. IPDPS (Workshops) Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani
2024	J	`jnl`	An Integrated FPGA Accelerator for Deep Learning-Based 2D/3D Path Planning. IEEE Trans. Computers Keisuke Sugiura, Hiroki Matsutani
2024	J	`jnl`	Development of Wall Hammering Inspection Systems Using Two-Wheeled Multi-Copters. J. Robotics Mechatronics Shuto Seki, Keisuke Sugiura, Satoshi Nakano, Masao Watanabe, Manabu Yamada
2024	J	`jnl`	FPGA-Accelerated Correspondence-free Point Cloud Registration with PointNet Features. CoRR Keisuke Sugiura, Hiroki Matsutani
2023	—	`conf`	A Lightweight Transformer Model using Neural ODE for FPGAs. IPDPS Workshops Ikumi Okubo, Keisuke Sugiura, Hiroki Kawakami, Hiroki Matsutani
2023	J	`jnl`	A Low-Cost Neural ODE with Depthwise Separable Convolution for Edge Domain Adaptation on FPGAs. IEICE Trans. Inf. Syst. Hiroki Kawakami, Hirohisa Watanabe, Keisuke Sugiura, Hiroki Matsutani
2023	—	`conf`	An Edge-Server Partitioning Method for 3D LiDAR SLAM on FPGAs. IPDPS Workshops Mizuki Yasuda, Keisuke Sugiura, Ryuto Kojima, Hiroki Matsutani
2023	C	`conf`	An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs. PDP Keisuke Sugiura, Hiroki Matsutani
2023	J	`jnl`	An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm. CoRR Kazuki Sunaga, Keisuke Sugiura, Hiroki Matsutani
2023	J	`jnl`	An Integrated FPGA Accelerator for Deep Learning-based 2D/3D Path Planning. CoRR Keisuke Sugiura, Hiroki Matsutani
2022	J	`jnl`	A Universal LiDAR SLAM Accelerator System on Low-Cost FPGA. IEEE Access Keisuke Sugiura, Hiroki Matsutani
2022	J	`jnl`	An Efficient Accelerator for Deep Learning-based Point Cloud Registration on FPGAs. CoRR Keisuke Sugiura, Hiroki Matsutani
2022	—	`conf`	P3Net: PointNet-based Path Planning on FPGA. FPT Keisuke Sugiura, Hiroki Matsutani
2022	C	`conf`	dsODENet: Neural ODE and Depthwise Separable Convolution for Domain Adaptation on FPGAs. PDP Hiroki Kawakami, Hirohisa Watanabe, Keisuke Sugiura, Hiroki Matsutani
2021	J	`jnl`	A Low-Cost Neural ODE with Depthwise Separable Convolution for Edge Domain Adaptation on FPGAs. CoRR Hiroki Kawakami, Hirohisa Watanabe, Keisuke Sugiura, Hiroki Matsutani
2021	—	`conf`	A unified accelerator design for LiDAR SLAM algorithms for low-end FPGAs. FPT Keisuke Sugiura, Hiroki Matsutani
2021	J	`jnl`	An FPGA Acceleration and Optimization Techniques for 2D LiDAR SLAM Algorithm. IEICE Trans. Inf. Syst. Keisuke Sugiura, Hiroki Matsutani
2021	J	`jnl`	Particle Filter-based vs. Graph-based: SLAM Acceleration on Low-end FPGAs. CoRR Keisuke Sugiura, Hiroki Matsutani
2020	J	`jnl`	An FPGA Acceleration and Optimization Techniques for 2D LiDAR SLAM Algorithm. CoRR Keisuke Sugiura, Hiroki Matsutani
2017	J	`jnl`	An extension of Godunov SPH II: Application to elastic dynamics. J. Comput. Phys. Keisuke Sugiura, Shu-ichiro Inutsuka
2016	J	`jnl`	An extension of Godunov SPH: Application to negative pressure media. J. Comput. Phys. Keisuke Sugiura, Shu-ichiro Inutsuka
2013	—	`conf`	Smart Meter Data Analysis for Power Theft Detection. MLDM Daniel Nikolaev Nikovski, Zhenhua Wang, Alan Esenther, Hongbo Sun, Keisuke Sugiura, Toru Muso, Kaoru Tsuru