Keh-Chung Wang

34 papers A* 1C 1Journal 12Unranked 20
YearRankTypeTitle / Venue / Authors
2025 — conf
A Novel 3D Stacked Vertical-Channel High-Voltage Peripheral Transistor for Largely Scaled the WL Driver Circuit of 1000-layer 3D NAND Flash.
IMW
Teng-Hao Yeh, Hang-Ting Lue, Wei-Chen Chen, Keh-Chung Wang, Chih-Yuan Lu
2025 — conf
Utilizing 2T SONOS Cell Characteristics for L2/Euclidean Distance Computing - From Unit Cell to Array Operations.
IMW
Yu-Hsuan Lin, Po-Hao Tseng, Ming-Hsiu Lee, Yu-Yu Lin, Feng-Min Lee, Dai-Ying Lee, Pei-Ying Du, Chih-Chieh Lin, Teng-Hao Yeh, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu
2024 — conf
3D-NAND based Filtering Cube with High Resolution 2D Query and Tunable Feature Length for Computational SSD.
IMW
Po-Hao Tseng, Shao-Yu Fang, Yu-Hsuan Lin, Feng-Ming Lee, Jhe-Yi Liao, Yu-Yu Lin, Ming-Hsiu Lee, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu
2024 — conf
Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs.
VLSI Technology and Circuits
Feng-Min Lee, Po-Hao Tseng, Yu-Yu Lin, Yu-Hsuan Lin, Wei-Lun Weng, Nei-Chih Lin, Po-Jung Sung, Chien-Ting Wu, Chih-Chao Yang, Wen-Fa Wu, Chang-Hong Shen, Tuo-Hung Hou, Ming-Hsiu Lee, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu
2024 — conf
Improved 3D DRAM Design Based on Gate-Controlled Thyristor Featuring Two Asymmetrical Horizontal WL's and Vertical BL for Better Cell Size Scaling and Array Selection.
IMW
Wei-Chen Chen, Hang-Ting Lue, Ming-Hung Wu, Yu-Tang Lin, Keh-Chung Wang, Chih-Yuan Lu
2024 — conf
Multi-Gate Access Transistor to Minimize GIDL Leakage Current for Scaling 2-tier Stacked 4F
IMW
Hang-Ting Lue, Wei-Chen Chen, Yu-Tang Lin, Keh-Chung Wang, Chih-Yuan Lu
2024 — conf
Reliability Assessment for an In-3D-NAND Approximate Searching Solution.
IRPS
Po-Hao Tseng, Yu-Hsuan Lin, Feng-Min Lee, Tian-Cig Bo, Ming-Hsiu Lee, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu
2023 — conf
A Simulation Study of Scaling Capability toward 10nm for the 3D Stackable Gate-Controlled Thyristor (GCT) DRAM Device.
IMW
Wei-Chen Chen, Hang-Ting Lue, Tzu-Hsuan Hsu, Keh-Chung Wang, Chih-Yuan Lu
2023 — conf
Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming Distance.
VLSI Technology and Circuits
Chih-Chang Hsieh, Hang-Ting Lue, Yung-Chun Li, Shuo-Nan Hung, Chun-Hsiung Hung, Keh-Chung Wang, Chih-Yuan Lu
2023 — conf
SLC and MLC In-Memory-Approximate-Search Solutions in Commercial 48-layer and 96-layer 3D-NAND Flash Memories.
IMW
Po-Hao Tseng, Tian-Cig Bo, Yu-Hsuan Lin, Yu-Chao Lin, Jhe-Yi Liao, Feng-Ming Lee, Yu-Yu Lin, Ming-Hsiu Lee, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu
2022 — conf
A 512Gb In-Memory-Computing 3D-NAND Flash Supporting Similar-Vector-Matching Operations on Edge-AI Devices.
ISSCC
Han-Wen Hu, Wei-Chen Wang, Chung Kuang Chen, Yung-Chun Lee, Bo-Rong Lin, Huai-Mu Wang, Yen-Po Lin, Yu-Chao Lin, Chih-Chang Hsieh, Chia-Ming Hu, Yi-Ting Lai, Han-Sung Chen, Yuan-Hao Chang, Hsiang-Pang Li, Tei-Wei Kuo, Keh-Chung Wang, Meng-Fan Chang, Chun-Hsiung Hung, Chih-Yuan Lu
2022 — conf
First Experimental Study of Floating-Body Cell Transient Reliability Characteristics of Both N- and P-Channel Vertical Gate-All-Around Devices with Split-Gate Structures.
IRPS
Cheng-Lin Sung, Sheng-Ting Fan, Hang-Ting Lue, Wei-Chen Chen, Pei-Ying Du, Teng-Hao Yeh, Keh-Chung Wang, Chih-Yuan Lu
2022 A* conf
ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration.
MICRO
Han-Wen Hu, Wei-Chen Wang, Yuan-Hao Chang, Yung-Chun Lee, Bo-Rong Lin, Huai-Mu Wang, Yen-Po Lin, Yu-Ming Huang, Chong-Ying Lee, Tzu-Hsiang Su, Chih-Chang Hsieh, Chia-Ming Hu, Yi-Ting Lai, Chung Kuang Chen, Han-Sung Chen, Hsiang-Pang Li, Tei-Wei Kuo, Meng-Fan Chang, Keh-Chung Wang, Chun-Hsiung Hung, Chih-Yuan Lu
2022 — conf
In-Memory Approximate Computing Architecture Based on 3D-NAND Flash Memories.
VLSI Technology and Circuits
Po-Hao Tseng, Yu-Hsuan Lin, Feng-Ming Lee, Tian-Cig Bo, Yung-Chun Li, Ming-Hsiu Lee, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu
2022 — conf
NOR Flash-based Multilevel In-Memory-Searching Architecture for Approximate Computing.
IMW
Yu-Hsuan Lin, Po-Hao Tseng, Feng-Min Lee, Ming-Hsiu Lee, Chih-Chang Hsieh, Dai-Ying Lee, Keh-Chung Wang, Chih-Yuan Lu
2021 C conf
Design of Computing-in-Memory (CIM) with Vertical Split-Gate Flash Memory for Deep Neural Network (DNN) Inference Accelerator.
ISCAS
Hang-Ting Lue, Han-Wen Hu, Tzu-Hsuan Hsu, Po-Kai Hsu, Keh-Chung Wang, Chih-Yuan Lu
2021 — conf
First Study of P-Channel Vertical Split-Gate Flash Memory Device with Various Electron and Hole Injection Methods and Potential Future Possibility to Enable Functional Memory Circuits.
IMW
Cheng-Lin Sung, Hang-Ting Lue, Wei-Chen Chen, Tzu-Hsuan Hsu, Keh-Chung Wang, Chih-Yuan Lu
2021 — conf
Robust Brain-Inspired Computing: On the Reliability of Spiking Neural Network Using Emerging Non-Volatile Synapses.
IRPS
Ming-Liang Wei, Hussam Amrouch, Cheng-Lin Sung, Hang-Ting Lue, Chia-Lin Yang, Keh-Chung Wang, Chih-Yuan Lu
2021 — conf
Write-In-Place Operation and It's Advantages to Upgrade the 3D AND-type Flash Memory Performances.
IMW
Hang-Ting Lue, Tzu-Hsuan Hsu, Cheng-Lin Sung, Teng-Hao Yeh, Keh-Chung Wang, Chih-Yuan Lu
2020 — conf
Introduction of Non-Volatile Computing In Memory (nvCIM) by 3D NAND Flash for Inference Accelerator of Deep Neural Network (DNN) and the Read Disturb Reliability Evaluation : (Invited Paper).
IRPS
Hang-Ting Lue, Po-Kai Hsu, Keh-Chung Wang, Chih-Yuan Lu
2020 — conf
Study of the Walk-Out Effect of Junction Breakdown Instability of the High-Voltage Depletion-Mode N-Channel MOSFET for NAND Flash Peripheral Device and an Efficient Layout Solution.
IRPS
Chieh Roger Lo, Teng-Hao Yeh, Wei-Chen Chen, Hang-Ting Lue, Keh-Chung Wang, Chih-Yuan Lu, Yao-Wen Chang, Yung-Hsiang Chen, Chu-Yung Liu
2014 J jnl
A 26-28-Gb/s Full-Rate Clock and Data Recovery Circuit With Embedded Equalizer in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Li Sun, Quan Pan, Keh-Chung Wang, C. Patrick Yue
2014 — conf
A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer.
VLSIC
Quan Pan, Zhengxiong Hou, Yipeng Wang, Yan Lu, Wing-Hung Ki, Keh-Chung Wang, C. Patrick Yue
2000 J jnl
A 10-Gb/s high-isolation, 16×16 crosspoint switch implemented with AlGaAs/GaAs HBT's.
IEEE J. Solid State Circuits
Andre G. Metzger, Charles E. Chang, Ken D. Pedrotti, Steve M. Beccue, Keh-Chung Wang, Peter M. Asbeck
1996 J jnl
A packaged broad-band monolithic variable gain amplifier implemented in AlGaAs/GaAs HBT technology.
IEEE J. Solid State Circuits
Ruai Yu, Steve M. Beccue, P. J. Zampardi, Richard L. Pierson, Anders Petersen, Keh-Chung Wang, John E. Bowers
1995 J jnl
A 6-b, 4 GSa/s GaAs HBT ADC.
IEEE J. Solid State Circuits
Ken Poulton, Knud L. Knudsen, John J. Corcoran, Keh-Chung Wang, Randy B. Nubling, Richard L. Pierson, Mau-Chung Frank Chang, Peter M. Asbeck, R. T. Huang
1993 J jnl
GaAs-based heterojunction bipolar transistors for very high performance electronic circuits.
Proc. IEEE
Peter M. Asbeck, Mau-Chung Frank Chang, Keh-Chung Wang, Gerard J. Sullivan, Derek T. Cheung
1992 J jnl
11.6-GHz 1:4 regenerating demultiplexer with bit-rotation control and 6.1-GHz auto-latching phase-aligner ICs using AlGaAs/GaAs HBT technology.
IEEE J. Solid State Circuits
Mehran Bagheri, Keh-Chung Wang, Mau-Chung Frank Chang, Randy B. Nubling, Peter M. Asbeck, Andy Chen
1992 J jnl
AlGaAs/GaAs HBT IC's for high-speed lightwave transmission systems.
IEEE J. Solid State Circuits
Klaus Runge, Detlef Daniel, R. D. Standley, James L. Gimlett, Randall B. Nubling, Richard L. Pierson, Steve M. Beccue, Keh-Chung Wang, Neng-Huang Sheng, Mau-Chung Frank Chang, Dong Ming Chen, Peter M. Asbeck
1992 J jnl
Diode-HBT-logic circuits monolithically integrable with ECl/CML circuits.
IEEE J. Solid State Circuits
Keh-Chung Wang, Steve M. Beccue, Mau-Chung Frank Chang, Randall B. Nubling, Arthur M. Cappon, Tom C.-T. Tsen, Dong Ming Chen, Peter M. Asbeck, Chung Y. Kwok
1992 J jnl
Thermal design and simulation of bipolar integrated circuits.
IEEE J. Solid State Circuits
Ken Poulton, Knud L. Knudsen, John J. Corcoran, Keh-Chung Wang, Richard L. Pierson, Randall B. Nubling, Mau-Chung Frank Chang
1991 J jnl
A 15-GHz gate array implemented with AlGaAs/GaAs heterojunction bipolar transistors.
IEEE J. Solid State Circuits
Keh-Chung Wang, Peter M. Asbeck, Mau-Chung Frank Chang, Randy B. Nubling, Richard L. Pierson, Neng-Huang Sheng, Gerard J. Sullivan, Jimmy Yu, Andy Chen, Don Clement, Tom C.-T. Tsen, Haris F. Basit, Joseph D. George, Rock Young
1991 J jnl
A high-speed multimodulus HBT prescaler for frequency synthesizer applications.
IEEE J. Solid State Circuits
Neng-Huang Sheng, Richard L. Pierson, Keh-Chung Wang, Randy B. Nubling, Peter M. Asbeck, Mau-Chung Frank Chang, W. L. Edwards, D. E. Philips
1991 J jnl
High-speed 8:1 multiplexer and 1:8 demultiplexer implemented with AlGaAs/GaAs HBTs.
IEEE J. Solid State Circuits
Randy B. Nubling, James Yu, Keh-Chung Wang, Peter M. Asbeck, Neng-Huang Sheng, Mau-Chung Frank Chang, Richard L. Pierson, Gerard J. Sullivan, Mark A. McDonald, A. J. Price, A. D. M. Chen